periph_conf.h File Reference

Peripheral MCU configuration for TI CC2650 LaunchPad. More...

Detailed Description

Peripheral MCU configuration for TI CC2650 LaunchPad.

Author
Nicholas Jackson nicho.nosp@m.las..nosp@m.jacks.nosp@m.on@g.nosp@m.riffi.nosp@m.thun.nosp@m.i.edu.nosp@m..au
Sebastian Meiling s@mln.nosp@m.g.ne.nosp@m.t

Definition in file periph_conf.h.

#include "periph_cpu.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Clock configuration

#define CLOCK_CORECLOCK   (48000000U)
 

Timer configuration

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e.

if multiple timers are enabled.

#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

The used CC26x0 CPU only supports a single UART device, so all we need to configure are the RX and TX pins.

Optionally we can enable hardware flow control, by setting flow_control to 1 and defining pins for cts_pin and rts_pin.

#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

I2C configuration

#define I2C_NUMOF   (1)
 
#define I2C_SDA_PIN   (14)
 
#define I2C_SCL_PIN   (15)
 

Variable Documentation

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.cfg = GPT_CFG_16T,
.chn = 2,
},
{
.cfg = GPT_CFG_32T,
.chn = 1,
},
{
.cfg = GPT_CFG_16T,
.chn = 2,
},
{
.cfg = GPT_CFG_32T,
.chn = 1,
}
}
#define GPT_CFG_32T
GPT register values.

Definition at line 46 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.regs = UART0,
.tx_pin = 3,
.rx_pin = 2,
.rts_pin = 0,
.cts_pin = 0,
.flow_control = 0,
.intn = UART0_IRQN
}
}
21 UART0 Rx and Tx
Definition: cc26xx_cc13xx.h:56
#define UART0
UART0 register bank.

Definition at line 79 of file periph_conf.h.