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encx24j600_defines.h File Reference
Drivers » Network Device Drivers » ENCX24J600

Register definitions for the ENCX24J600 Ethernet device. More...

Detailed Description

Register definitions for the ENCX24J600 Ethernet device.

Author
Kaspar Schleiser kaspa.nosp@m.r@sc.nosp@m.hleis.nosp@m.er.d.nosp@m.e

Definition in file encx24j600_defines.h.

Go to the source code of this file.

SPI instruction set

#define ENC_RCR   0x00 /* read control register */
 
#define ENC_WCR   0x04 /* write control register */
 
#define ENC_RCRU   0x20 /* read control register unbanked */
 
#define ENC_WCRU   0x22 /* write control register unbanked */
 
#define ENC_BFSU   0x24 /* set bits unbanked */
 
#define ENC_BFCU   0x26 /* clear bits unbanked */
 
#define ENC_RGPDATA   0x28 /* Read EGPDATA */
 
#define ENC_WGPDATA   0x2a /* Write EGPDATA */
 
#define ENC_RRXDATA   0x2c /* Read ERXDATA */
 
#define ENC_WRXDATA   0x2e /* Write ERXDATA */
 
#define ENC_RUDADATA   0x30 /* Read EUDADATA */
 
#define ENC_WUDADATA   0x32 /* Write EUDADATA */
 
#define ENC_BFS   0x80 /* Bit Field Set */
 
#define ENC_BFC   0xa0 /* Bit Field Clear */
 
#define ENC_SETETHRST   0xca /* System Reset */
 
#define ENC_SETPKTDEC   0xcc /* Decrements PKTCNT by setting PKTDEC (ECON1<5>) */
 
#define ENC_ENABLERX   0xe8 /* Enables packet reception by setting RXEN (ECON1<0>) */
 
#define ENC_DISABLERX   0xea /* Disable packet reception by clearing RXEN (ECON1<0>) */
 
#define ENC_SETEIE   0xec /* Enable Ethernet Interrupts by setting INT (ESTAT<16>) */
 
#define ENC_CLREIE   0xee /* Disable Ethernet Interrupts by clearing INT (ESTAT<16>) */
 
#define ENC_B0SEL   0xc0 /* select bank 0 */
 
#define ENC_B1SEL   0xc2 /* select bank 0 */
 
#define ENC_B2SEL   0xc4 /* select bank 0 */
 
#define ENC_B3SEL   0xc6 /* select bank 0 */
 
#define ENC_RBSEL   0xc8 /* Read Bank Select */
 
#define ENC_SETTXRTS   0xd4 /* Sets TXRTS (ECON1<1>), sends an Ethernet packet */
 

16bit Registers

#define ENC_ETXST   0x00
 
#define ENC_ETXLEN   0x02
 
#define ENC_ERXST   0x04
 
#define ENC_ERXTAIL   0x06
 
#define ENC_ERXHEAD   0x08
 
#define ENC_ETXSTAT   0x12
 
#define ENC_ETXWIRE   0x14
 
#define ENC_EUDAST   0x16
 
#define ENC_ESTAT   0x1a
 
#define ENC_EIR   0x1c /* Interrupt Flag Register */
 
#define ENC_ECON1   0x1e
 
#define ENC_ERXFCON   0x34 /* Receive filter control register */
 
#define ENC_MACON2   0x42
 
#define ENC_MAMXFL   0x4a /* MAC maximum frame length */
 
#define ENC_MAADR3   0x60 /* MAC address byte 5&6 */
 
#define ENC_MAADR2   0x62 /* MAC address byte 3&4 */
 
#define ENC_MAADR1   0x64 /* MAC address byte 1&2 */
 
#define ENC_MIWR   0x66
 
#define ENC_MIREGADR   0x54
 
#define ENC_ECON2   0x6e
 
#define ENC_EIE   0x72 /* Interrupt Enable Register */
 
#define ENC_EGPRDPT   0x86 /* General Purpose SRAM read pointer */
 
#define ENC_EGPWRPT   0x88 /* General Purpose SRAM write pointer */
 
#define ENC_ERXRDPT   0x8a /* RX buffer read pointer */
 
#define ENC_ERXWRPT   0x8c /* RX buffer write pointer */
 

PHY Registers

(access with phy_reg_* functions)

#define ENC_PHCON1   0x00
 
#define ENC_PHSTAT1   0x01
 
#define ENC_PHANA   0x04
 
#define ENC_PHANLPA   0x05
 
#define ENC_PHANE   0x06
 
#define ENC_PHCON2   0x11
 
#define ENC_PHSTAT2   0x1b
 
#define ENC_PHSTAT3   0x1f
 

ESTAT bits

#define ENC_PHYLNK   (1<<8)
 
#define ENC_CLKRDY   (1<<12)
 

ECON1 bits

#define ENC_RXEN   (1<<0)
 
#define ENC_TXRTS   (1<<1)
 
#define ENC_DMANOCS   (1<<2)
 
#define ENC_DMACSSD   (1<<3)
 
#define ENC_DMACPY   (1<<4)
 
#define ENC_DMAST   (1<<5)
 
#define ENC_FCOP0   (1<<6)
 
#define ENC_FCOP1   (1<<7)
 
#define ENC_PKTDEC   (1<<8)
 
#define ENC_AESOP0   (1<<9)
 
#define ENC_AESOP1   (1<<10)
 
#define ENC_AESST   (1<<11)
 
#define ENC_HASHLST   (1<<12)
 
#define ENC_HASHOP   (1<<13)
 
#define ENC_HASHEN   (1<<14)
 
#define ENC_MODEXST   (1<<15)
 

ECON2 bits

#define ENC_ETHRST   (1<<4)
 
#define ENC_AUTOFC   (1<<7) /* automatic flow control enable bit */
 

EIR bits

#define ENC_PCFULIE   (1<<0)
 
#define ENC_RXABTIE   (1<<1)
 
#define ENC_TXABTIE   (1<<2)
 
#define ENC_TXIE   (1<<3)
 
#define ENC_DMAIE   (1<<5)
 
#define ENC_PKTIE   (1<<6)
 
#define ENC_LINKIE   (1<<11)
 
#define ENC_AESIE   (1<<12)
 
#define ENC_HASHIE   (1<<13)
 
#define ENC_MODEXIE   (1<<14)
 
#define ENC_INTIE   (1<<15)
 
#define ENC_PCFULIF   (1<<0)
 
#define ENC_RXABTIF   (1<<1)
 
#define ENC_TXABTIF   (1<<2)
 
#define ENC_TXIF   (1<<3)
 
#define ENC_DMAIF   (1<<5)
 
#define ENC_PKTIF   (1<<6)
 
#define ENC_LINKIF   (1<<11)
 
#define ENC_AESIF   (1<<12)
 
#define ENC_HASHIF   (1<<13)
 
#define ENC_MODEXIF   (1<<14)
 
#define ENC_CRYPTEN   (1<<15)
 
#define ENC_MCEN   (1<<1)
 ERXFCON bits.
 

Macro Definition Documentation

◆ ENC_AESIE

#define ENC_AESIE   (1<<12)

Definition at line 173 of file encx24j600_defines.h.

◆ ENC_AESIF

#define ENC_AESIF   (1<<12)

Definition at line 190 of file encx24j600_defines.h.

◆ ENC_AESOP0

#define ENC_AESOP0   (1<<9)

Definition at line 145 of file encx24j600_defines.h.

◆ ENC_AESOP1

#define ENC_AESOP1   (1<<10)

Definition at line 146 of file encx24j600_defines.h.

◆ ENC_AESST

#define ENC_AESST   (1<<11)

Definition at line 147 of file encx24j600_defines.h.

◆ ENC_AUTOFC

#define ENC_AUTOFC   (1<<7) /* automatic flow control enable bit */

Definition at line 159 of file encx24j600_defines.h.

◆ ENC_B0SEL

#define ENC_B0SEL   0xc0 /* select bank 0 */

Definition at line 59 of file encx24j600_defines.h.

◆ ENC_B1SEL

#define ENC_B1SEL   0xc2 /* select bank 0 */

Definition at line 60 of file encx24j600_defines.h.

◆ ENC_B2SEL

#define ENC_B2SEL   0xc4 /* select bank 0 */

Definition at line 61 of file encx24j600_defines.h.

◆ ENC_B3SEL

#define ENC_B3SEL   0xc6 /* select bank 0 */

Definition at line 62 of file encx24j600_defines.h.

◆ ENC_BFC

#define ENC_BFC   0xa0 /* Bit Field Clear */

Definition at line 50 of file encx24j600_defines.h.

◆ ENC_BFCU

#define ENC_BFCU   0x26 /* clear bits unbanked */

Definition at line 38 of file encx24j600_defines.h.

◆ ENC_BFS

#define ENC_BFS   0x80 /* Bit Field Set */

Definition at line 49 of file encx24j600_defines.h.

◆ ENC_BFSU

#define ENC_BFSU   0x24 /* set bits unbanked */

Definition at line 37 of file encx24j600_defines.h.

◆ ENC_CLKRDY

#define ENC_CLKRDY   (1<<12)

Definition at line 129 of file encx24j600_defines.h.

◆ ENC_CLREIE

#define ENC_CLREIE   0xee /* Disable Ethernet Interrupts by clearing INT (ESTAT<16>) */

Definition at line 57 of file encx24j600_defines.h.

◆ ENC_CRYPTEN

#define ENC_CRYPTEN   (1<<15)

Definition at line 193 of file encx24j600_defines.h.

◆ ENC_DISABLERX

#define ENC_DISABLERX   0xea /* Disable packet reception by clearing RXEN (ECON1<0>) */

Definition at line 55 of file encx24j600_defines.h.

◆ ENC_DMACPY

#define ENC_DMACPY   (1<<4)

Definition at line 140 of file encx24j600_defines.h.

◆ ENC_DMACSSD

#define ENC_DMACSSD   (1<<3)

Definition at line 139 of file encx24j600_defines.h.

◆ ENC_DMAIE

#define ENC_DMAIE   (1<<5)

Definition at line 170 of file encx24j600_defines.h.

◆ ENC_DMAIF

#define ENC_DMAIF   (1<<5)

Definition at line 187 of file encx24j600_defines.h.

◆ ENC_DMANOCS

#define ENC_DMANOCS   (1<<2)

Definition at line 138 of file encx24j600_defines.h.

◆ ENC_DMAST

#define ENC_DMAST   (1<<5)

Definition at line 141 of file encx24j600_defines.h.

◆ ENC_ECON1

#define ENC_ECON1   0x1e

Definition at line 82 of file encx24j600_defines.h.

◆ ENC_ECON2

#define ENC_ECON2   0x6e

Definition at line 96 of file encx24j600_defines.h.

◆ ENC_EGPRDPT

#define ENC_EGPRDPT   0x86 /* General Purpose SRAM read pointer */

Definition at line 100 of file encx24j600_defines.h.

◆ ENC_EGPWRPT

#define ENC_EGPWRPT   0x88 /* General Purpose SRAM write pointer */

Definition at line 101 of file encx24j600_defines.h.

◆ ENC_EIE

#define ENC_EIE   0x72 /* Interrupt Enable Register */

Definition at line 98 of file encx24j600_defines.h.

◆ ENC_EIR

#define ENC_EIR   0x1c /* Interrupt Flag Register */

Definition at line 81 of file encx24j600_defines.h.

◆ ENC_ENABLERX

#define ENC_ENABLERX   0xe8 /* Enables packet reception by setting RXEN (ECON1<0>) */

Definition at line 54 of file encx24j600_defines.h.

◆ ENC_ERXFCON

#define ENC_ERXFCON   0x34 /* Receive filter control register */

Definition at line 84 of file encx24j600_defines.h.

◆ ENC_ERXHEAD

#define ENC_ERXHEAD   0x08

Definition at line 76 of file encx24j600_defines.h.

◆ ENC_ERXRDPT

#define ENC_ERXRDPT   0x8a /* RX buffer read pointer */

Definition at line 103 of file encx24j600_defines.h.

◆ ENC_ERXST

#define ENC_ERXST   0x04

Definition at line 74 of file encx24j600_defines.h.

◆ ENC_ERXTAIL

#define ENC_ERXTAIL   0x06

Definition at line 75 of file encx24j600_defines.h.

◆ ENC_ERXWRPT

#define ENC_ERXWRPT   0x8c /* RX buffer write pointer */

Definition at line 104 of file encx24j600_defines.h.

◆ ENC_ESTAT

#define ENC_ESTAT   0x1a

Definition at line 80 of file encx24j600_defines.h.

◆ ENC_ETHRST

#define ENC_ETHRST   (1<<4)

Definition at line 158 of file encx24j600_defines.h.

◆ ENC_ETXLEN

#define ENC_ETXLEN   0x02

Definition at line 73 of file encx24j600_defines.h.

◆ ENC_ETXST

#define ENC_ETXST   0x00

Definition at line 72 of file encx24j600_defines.h.

◆ ENC_ETXSTAT

#define ENC_ETXSTAT   0x12

Definition at line 77 of file encx24j600_defines.h.

◆ ENC_ETXWIRE

#define ENC_ETXWIRE   0x14

Definition at line 78 of file encx24j600_defines.h.

◆ ENC_EUDAST

#define ENC_EUDAST   0x16

Definition at line 79 of file encx24j600_defines.h.

◆ ENC_FCOP0

#define ENC_FCOP0   (1<<6)

Definition at line 142 of file encx24j600_defines.h.

◆ ENC_FCOP1

#define ENC_FCOP1   (1<<7)

Definition at line 143 of file encx24j600_defines.h.

◆ ENC_HASHEN

#define ENC_HASHEN   (1<<14)

Definition at line 150 of file encx24j600_defines.h.

◆ ENC_HASHIE

#define ENC_HASHIE   (1<<13)

Definition at line 174 of file encx24j600_defines.h.

◆ ENC_HASHIF

#define ENC_HASHIF   (1<<13)

Definition at line 191 of file encx24j600_defines.h.

◆ ENC_HASHLST

#define ENC_HASHLST   (1<<12)

Definition at line 148 of file encx24j600_defines.h.

◆ ENC_HASHOP

#define ENC_HASHOP   (1<<13)

Definition at line 149 of file encx24j600_defines.h.

◆ ENC_INTIE

#define ENC_INTIE   (1<<15)

Definition at line 176 of file encx24j600_defines.h.

◆ ENC_LINKIE

#define ENC_LINKIE   (1<<11)

Definition at line 172 of file encx24j600_defines.h.

◆ ENC_LINKIF

#define ENC_LINKIF   (1<<11)

Definition at line 189 of file encx24j600_defines.h.

◆ ENC_MAADR1

#define ENC_MAADR1   0x64 /* MAC address byte 1&2 */

Definition at line 91 of file encx24j600_defines.h.

◆ ENC_MAADR2

#define ENC_MAADR2   0x62 /* MAC address byte 3&4 */

Definition at line 90 of file encx24j600_defines.h.

◆ ENC_MAADR3

#define ENC_MAADR3   0x60 /* MAC address byte 5&6 */

Definition at line 89 of file encx24j600_defines.h.

◆ ENC_MACON2

#define ENC_MACON2   0x42

Definition at line 86 of file encx24j600_defines.h.

◆ ENC_MAMXFL

#define ENC_MAMXFL   0x4a /* MAC maximum frame length */

Definition at line 87 of file encx24j600_defines.h.

◆ ENC_MCEN

#define ENC_MCEN   (1<<1)

ERXFCON bits.

Definition at line 200 of file encx24j600_defines.h.

◆ ENC_MIREGADR

#define ENC_MIREGADR   0x54

Definition at line 94 of file encx24j600_defines.h.

◆ ENC_MIWR

#define ENC_MIWR   0x66

Definition at line 93 of file encx24j600_defines.h.

◆ ENC_MODEXIE

#define ENC_MODEXIE   (1<<14)

Definition at line 175 of file encx24j600_defines.h.

◆ ENC_MODEXIF

#define ENC_MODEXIF   (1<<14)

Definition at line 192 of file encx24j600_defines.h.

◆ ENC_MODEXST

#define ENC_MODEXST   (1<<15)

Definition at line 151 of file encx24j600_defines.h.

◆ ENC_PCFULIE

#define ENC_PCFULIE   (1<<0)

Definition at line 166 of file encx24j600_defines.h.

◆ ENC_PCFULIF

#define ENC_PCFULIF   (1<<0)

Definition at line 183 of file encx24j600_defines.h.

◆ ENC_PHANA

#define ENC_PHANA   0x04

Definition at line 116 of file encx24j600_defines.h.

◆ ENC_PHANE

#define ENC_PHANE   0x06

Definition at line 118 of file encx24j600_defines.h.

◆ ENC_PHANLPA

#define ENC_PHANLPA   0x05

Definition at line 117 of file encx24j600_defines.h.

◆ ENC_PHCON1

#define ENC_PHCON1   0x00

Definition at line 114 of file encx24j600_defines.h.

◆ ENC_PHCON2

#define ENC_PHCON2   0x11

Definition at line 119 of file encx24j600_defines.h.

◆ ENC_PHSTAT1

#define ENC_PHSTAT1   0x01

Definition at line 115 of file encx24j600_defines.h.

◆ ENC_PHSTAT2

#define ENC_PHSTAT2   0x1b

Definition at line 120 of file encx24j600_defines.h.

◆ ENC_PHSTAT3

#define ENC_PHSTAT3   0x1f

Definition at line 121 of file encx24j600_defines.h.

◆ ENC_PHYLNK

#define ENC_PHYLNK   (1<<8)

Definition at line 128 of file encx24j600_defines.h.

◆ ENC_PKTDEC

#define ENC_PKTDEC   (1<<8)

Definition at line 144 of file encx24j600_defines.h.

◆ ENC_PKTIE

#define ENC_PKTIE   (1<<6)

Definition at line 171 of file encx24j600_defines.h.

◆ ENC_PKTIF

#define ENC_PKTIF   (1<<6)

Definition at line 188 of file encx24j600_defines.h.

◆ ENC_RBSEL

#define ENC_RBSEL   0xc8 /* Read Bank Select */

Definition at line 63 of file encx24j600_defines.h.

◆ ENC_RCR

#define ENC_RCR   0x00 /* read control register */

Definition at line 31 of file encx24j600_defines.h.

◆ ENC_RCRU

#define ENC_RCRU   0x20 /* read control register unbanked */

Definition at line 34 of file encx24j600_defines.h.

◆ ENC_RGPDATA

#define ENC_RGPDATA   0x28 /* Read EGPDATA */

Definition at line 40 of file encx24j600_defines.h.

◆ ENC_RRXDATA

#define ENC_RRXDATA   0x2c /* Read ERXDATA */

Definition at line 43 of file encx24j600_defines.h.

◆ ENC_RUDADATA

#define ENC_RUDADATA   0x30 /* Read EUDADATA */

Definition at line 46 of file encx24j600_defines.h.

◆ ENC_RXABTIE

#define ENC_RXABTIE   (1<<1)

Definition at line 167 of file encx24j600_defines.h.

◆ ENC_RXABTIF

#define ENC_RXABTIF   (1<<1)

Definition at line 184 of file encx24j600_defines.h.

◆ ENC_RXEN

#define ENC_RXEN   (1<<0)

Definition at line 136 of file encx24j600_defines.h.

◆ ENC_SETEIE

#define ENC_SETEIE   0xec /* Enable Ethernet Interrupts by setting INT (ESTAT<16>) */

Definition at line 56 of file encx24j600_defines.h.

◆ ENC_SETETHRST

#define ENC_SETETHRST   0xca /* System Reset */

Definition at line 52 of file encx24j600_defines.h.

◆ ENC_SETPKTDEC

#define ENC_SETPKTDEC   0xcc /* Decrements PKTCNT by setting PKTDEC (ECON1<5>) */

Definition at line 53 of file encx24j600_defines.h.

◆ ENC_SETTXRTS

#define ENC_SETTXRTS   0xd4 /* Sets TXRTS (ECON1<1>), sends an Ethernet packet */

Definition at line 65 of file encx24j600_defines.h.

◆ ENC_TXABTIE

#define ENC_TXABTIE   (1<<2)

Definition at line 168 of file encx24j600_defines.h.

◆ ENC_TXABTIF

#define ENC_TXABTIF   (1<<2)

Definition at line 185 of file encx24j600_defines.h.

◆ ENC_TXIE

#define ENC_TXIE   (1<<3)

Definition at line 169 of file encx24j600_defines.h.

◆ ENC_TXIF

#define ENC_TXIF   (1<<3)

Definition at line 186 of file encx24j600_defines.h.

◆ ENC_TXRTS

#define ENC_TXRTS   (1<<1)

Definition at line 137 of file encx24j600_defines.h.

◆ ENC_WCR

#define ENC_WCR   0x04 /* write control register */

Definition at line 32 of file encx24j600_defines.h.

◆ ENC_WCRU

#define ENC_WCRU   0x22 /* write control register unbanked */

Definition at line 35 of file encx24j600_defines.h.

◆ ENC_WGPDATA

#define ENC_WGPDATA   0x2a /* Write EGPDATA */

Definition at line 41 of file encx24j600_defines.h.

◆ ENC_WRXDATA

#define ENC_WRXDATA   0x2e /* Write ERXDATA */

Definition at line 44 of file encx24j600_defines.h.

◆ ENC_WUDADATA

#define ENC_WUDADATA   0x32 /* Write EUDADATA */

Definition at line 47 of file encx24j600_defines.h.