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Compile compile-time configurations that are common for all ESP32x SoCs. More...

Detailed Description

Compile compile-time configurations that are common for all ESP32x SoCs.

Author
Gunar Schorcht gunar.nosp@m.@sch.nosp@m.orcht.nosp@m..net

Definition in file cpu_conf.h.

#include <stdint.h>
+ Include dependency graph for cpu_conf.h:

Go to the source code of this file.

Macros

#define PRINTF_BUFSIZ   256
 Buffer size used for printf functions (maximum length of formatted output).
 
#define PUF_SRAM_ATTRIBUTES   __attribute__((used, section(".noinit")))
 Attribute for memory sections required by SRAM PUF.
 
#define CPU_HAS_UNALIGNED_ACCESS   1
 Support of unaligned access.
 

Stack size configuration

#define THREAD_EXTRA_STACKSIZE   (512)
 Extra thread stack size required if newlib-nano is not used.
 
#define THREAD_EXTRA_STACKSIZE_PRINTF   (1536)
 Extra thread stack size if printf is used.
 
#define THREAD_STACKSIZE_DEFAULT   (2048)
 Default thread stack size.
 
#define THREAD_STACKSIZE_IDLE   (2048)
 Stack size for the idle thread.
 
#define ESP_WIFI_STACKSIZE   (THREAD_STACKSIZE_DEFAULT + THREAD_EXTRA_STACKSIZE)
 Stack size for the WiFi thread.
 

Flash page configuration

#define FLASHPAGE_SIZE   (4096U)
 Size of pages (flash sectors) in bytes.
 
#define FLASHPAGE_WRITE_BLOCK_SIZE   (4U)
 Minimum write block size.
 
#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT   (4U)
 Write block alignment.
 
#define FLASHPAGE_NUMOF   (CONFIG_ESP_FLASHPAGE_CAPACITY / FLASHPAGE_SIZE)
 Number of pages.
 
#define CPU_FLASH_BASE   ((uint32_t)&_fp_mem_start)
 CPU base address for flash page access as determined by the linker.