CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author: Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de; Joakim Nohlgård joaki.nosp@m.m.no.nosp@m.hlgar.nosp@m.d@ei.nosp@m.stec..nosp@m.se

Definition in file periph_cpu.h.

#include <stdint.h>
#include <stdbool.h>
#include "cpu.h"

Include dependency graph for periph_cpu.h:

Data Structures
struct	adc_conf_t
	ADC device configuration. More...

struct	pit_conf_t
	CPU specific timer PIT module configuration. More...

struct	i2c_conf_t
	I2C configuration structure. More...

struct	spi_conf_t
	SPI device configuration. More...

struct	uart_conf_t
	UART device configuration. More...

Macros
#define	GPIO_UNDEF (0xffff)
	Definition of a fitting UNDEF value.

#define	GPIO_PIN(x, y) (((x + 1) << 12) \| (x << 6) \| y)
	Define a CPU specific GPIO pin generator macro.

#define	CPUID_ADDR (&SIM->UIDMH)
	Starting offset of CPU_ID.

#define	CPUID_LEN (12U)
	Length of the CPU_ID in octets.

#define	GPIO_MODE(pu, pe, od, out) (pu \| (pe << 1) \| (od << 5) \| (out << 7))
	Generate GPIO mode bitfields.

#define	SPI_HWCS(x) (x)
	Define a CPU specific SPI hardware chip select line macro.

#define	SPI_HWCS_NUMOF (5)
	Kinetis CPUs have a maximum number of 5 hardware chip select lines.

#define	SPI_CS_UNDEF (GPIO_UNDEF)
	Define value for unused CS line.

#define	PERIPH_TIMER_PROVIDES_SET
	Prevent shared timer functions from being used.

#define	TIMER_CHANNEL_NUMOF 1
	Only a single channel supported by the driver/hardware.

#define	ADC_AVG_NONE (0)
	Disable hardware averaging.

#define	ADC_AVG_MAX (ADC_SC3_AVGE_MASK \| ADC_SC3_AVGS(3))
	Maximum hardware averaging (32 samples)

#define	KINETIS_HAVE_PLL 1
	Defined to 1 if the MCG in this Kinetis CPU has a PLL.

Enumerations
enum	{ PORT_A = 0 , PORT_B = 1 , PORT_C = 2 , PORT_D = 3 , PORT_E = 4 , PORT_F = 5 , PORT_G = 6 , GPIO_PORTS_NUMOF }
	Available ports on the Kinetis family. More...

enum	uart_mode_t { UART_MODE_8N1 = 0 , UART_MODE_8E1 = (UART_C1_M_MASK \| UART_C1_PE_MASK) , UART_MODE_8O1 = (UART_C1_M_MASK \| UART_C1_PE_MASK \| UART_C1_PT_MASK) }
	UART transmission modes. More...

enum	{ TIMER_PIT }
	Possible timer module types. More...

enum	uart_type_t { KINETIS_UART , KINETIS_LPUART }
	UART hardware module types. More...

Functions
void	gpio_init_port (gpio_t pin, uint32_t pcr)
	CPU internal function for initializing PORTs.

CPU specific gpio_t type definition
#define	HAVE_GPIO_T

typedef uint16_t	gpio_t

This CPU makes use of the following shared SPI functions
#define	PERIPH_SPI_NEEDS_TRANSFER_BYTE 1

#define	PERIPH_SPI_NEEDS_TRANSFER_REG 1

#define	PERIPH_SPI_NEEDS_TRANSFER_REGS 1

Kinetis power mode configuration
#define	PM_NUM_MODES (4U)

#define	PM_BLOCK(x)

#define	PM_UNBLOCK(x)

enum	{ KINETIS_PM_LLS = 0 , KINETIS_PM_VLPS = 1 , KINETIS_PM_STOP = 2 , KINETIS_PM_WAIT = 3 }

Hardware timer type-specific device macros
#define	TIMER_PIT_DEV(x) (TIMER_DEV(0 + (x)))
	Timers using PIT backend.

RTT configuration
#define	RTT_DEV (TIMER_LPTMR_DEV(0))

#define	RTT_MAX_VALUE (0x0000ffff)

#define	RTT_CLOCK_FREQUENCY (32768U) /* in Hz */

#define	RTT_MAX_FREQUENCY (32768U) /* in Hz */

#define	RTT_MIN_FREQUENCY (1U) /* in Hz */

#define	RTT_FREQUENCY RTT_MAX_FREQUENCY

Macro Definition Documentation

◆ ADC_AVG_MAX

#define ADC_AVG_MAX (ADC_SC3_AVGE_MASK | ADC_SC3_AVGS(3))

Maximum hardware averaging (32 samples)

Definition at line 374 of file periph_cpu.h.

◆ ADC_AVG_NONE

#define ADC_AVG_NONE (0)

Disable hardware averaging.

Definition at line 370 of file periph_cpu.h.

◆ CPUID_ADDR

#define CPUID_ADDR (&SIM->UIDMH)

Starting offset of CPU_ID.

Definition at line 87 of file periph_cpu.h.

◆ CPUID_LEN

#define CPUID_LEN (12U)

Length of the CPU_ID in octets.

Definition at line 91 of file periph_cpu.h.

◆ GPIO_MODE

#define GPIO_MODE	(	pu,
		pe,
		od,
		out
	)	(pu \| (pe << 1) \| (od << 5) \| (out << 7))

Generate GPIO mode bitfields.

We use the following bits to encode the pin mode:

bit 0: 0 for pull-down or 1 for pull-up
bit 1: pull resistor enable (as configured in bit 0)
bit 5: OD enable
bit 7: output or input mode

Definition at line 103 of file periph_cpu.h.

◆ GPIO_PIN

#define GPIO_PIN	(	x,
		y
	)	(((x + 1) << 12) \| (x << 6) \| y)

Define a CPU specific GPIO pin generator macro.

Definition at line 69 of file periph_cpu.h.

◆ GPIO_UNDEF

#define GPIO_UNDEF (0xffff)

Definition of a fitting UNDEF value.

Definition at line 64 of file periph_cpu.h.

◆ HAVE_GPIO_T

#define HAVE_GPIO_T

Definition at line 57 of file periph_cpu.h.

◆ KINETIS_HAVE_PLL

#define KINETIS_HAVE_PLL 1

Defined to 1 if the MCG in this Kinetis CPU has a PLL.

Definition at line 571 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE 1

Definition at line 137 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

#define PERIPH_SPI_NEEDS_TRANSFER_REG 1

Definition at line 138 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

#define PERIPH_SPI_NEEDS_TRANSFER_REGS 1

Definition at line 139 of file periph_cpu.h.

◆ PERIPH_TIMER_PROVIDES_SET

#define PERIPH_TIMER_PROVIDES_SET

Prevent shared timer functions from being used.

Definition at line 145 of file periph_cpu.h.

◆ PM_BLOCK

#define PM_BLOCK ( x )

Definition at line 175 of file periph_cpu.h.

◆ PM_NUM_MODES

#define PM_NUM_MODES (4U)

Definition at line 156 of file periph_cpu.h.

◆ PM_UNBLOCK

#define PM_UNBLOCK ( x )

Definition at line 176 of file periph_cpu.h.

◆ RTT_CLOCK_FREQUENCY

#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */

Definition at line 517 of file periph_cpu.h.

◆ RTT_DEV

#define RTT_DEV (TIMER_LPTMR_DEV(0))

Definition at line 515 of file periph_cpu.h.

◆ RTT_FREQUENCY

#define RTT_FREQUENCY RTT_MAX_FREQUENCY

Definition at line 521 of file periph_cpu.h.

◆ RTT_MAX_FREQUENCY

#define RTT_MAX_FREQUENCY (32768U) /* in Hz */

Definition at line 518 of file periph_cpu.h.

◆ RTT_MAX_VALUE

#define RTT_MAX_VALUE (0x0000ffff)

Definition at line 516 of file periph_cpu.h.

◆ RTT_MIN_FREQUENCY

#define RTT_MIN_FREQUENCY (1U) /* in Hz */

Definition at line 519 of file periph_cpu.h.

◆ SPI_CS_UNDEF

#define SPI_CS_UNDEF (GPIO_UNDEF)

Define value for unused CS line.

Definition at line 121 of file periph_cpu.h.

◆ SPI_HWCS

#define SPI_HWCS ( x ) (x)

Define a CPU specific SPI hardware chip select line macro.

We simply map the 5 hardware channels to the numbers [0-4], this still allows us to differentiate between GPIP_PINs and SPI_HWSC lines.

Definition at line 111 of file periph_cpu.h.

◆ SPI_HWCS_NUMOF

#define SPI_HWCS_NUMOF (5)

Kinetis CPUs have a maximum number of 5 hardware chip select lines.

Definition at line 116 of file periph_cpu.h.

◆ TIMER_CHANNEL_NUMOF

#define TIMER_CHANNEL_NUMOF 1

Only a single channel supported by the driver/hardware.

Definition at line 150 of file periph_cpu.h.

◆ TIMER_PIT_DEV

#define TIMER_PIT_DEV ( x ) (TIMER_DEV(0 + (x)))

Timers using PIT backend.

Definition at line 504 of file periph_cpu.h.

Typedef Documentation

◆ gpio_t

typedef uint16_t gpio_t

Definition at line 58 of file periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Definition at line 157 of file periph_cpu.h.

◆ anonymous enum

anonymous enum

Available ports on the Kinetis family.

Not all CPUs have the full number of ports, see your CPU data sheet for pinout.

Enumerator
PORT_A	port A
PORT_B	port B
PORT_C	port C
PORT_D	port D
PORT_E	port E
PORT_F	port F
PORT_G	port G
GPIO_PORTS_NUMOF	overall number of available ports

Definition at line 241 of file periph_cpu.h.

◆ anonymous enum

anonymous enum

Possible timer module types.

Enumerator
TIMER_PIT	PIT.

Definition at line 492 of file periph_cpu.h.

◆ uart_mode_t

enum uart_mode_t

UART transmission modes.

Enumerator
UART_MODE_8N1	8 data bits, no parity, 1 stop bit
UART_MODE_8E1	8 data bits, even parity, 1 stop bit
UART_MODE_8O1	8 data bits, odd parity, 1 stop bit

Definition at line 292 of file periph_cpu.h.

◆ uart_type_t

enum uart_type_t

UART hardware module types.

Enumerator
KINETIS_UART	Kinetis UART module type.
KINETIS_LPUART	Kinetis Low-power UART (LPUART) module type.

Definition at line 537 of file periph_cpu.h.

Function Documentation

◆ gpio_init_port()

void gpio_init_port	(	gpio_t	pin,
		uint32_t	pcr
	)

CPU internal function for initializing PORTs.

Parameters

[in]	pin	pin to initialize
[in]	pcr	value for the PORT's PCR register

Detailed Description

Data Structures

Macros

Enumerations

Functions

CPU specific gpio_t type definition

This CPU makes use of the following shared SPI functions

Kinetis power mode configuration

Hardware timer type-specific device macros

RTT configuration

Macro Definition Documentation

◆ ADC_AVG_MAX

◆ ADC_AVG_NONE

◆ CPUID_ADDR

◆ CPUID_LEN

◆ GPIO_MODE

◆ GPIO_PIN

◆ GPIO_UNDEF

◆ HAVE_GPIO_T

◆ KINETIS_HAVE_PLL

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

◆ PERIPH_TIMER_PROVIDES_SET

◆ PM_BLOCK

◆ PM_NUM_MODES

◆ PM_UNBLOCK

◆ RTT_CLOCK_FREQUENCY

◆ RTT_DEV

◆ RTT_FREQUENCY

◆ RTT_MAX_FREQUENCY

◆ RTT_MAX_VALUE

◆ RTT_MIN_FREQUENCY

◆ SPI_CS_UNDEF

◆ SPI_HWCS

◆ SPI_HWCS_NUMOF

◆ TIMER_CHANNEL_NUMOF

◆ TIMER_PIT_DEV

Typedef Documentation

◆ gpio_t

Enumeration Type Documentation

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

◆ uart_mode_t

◆ uart_type_t

Function Documentation

◆ gpio_init_port()