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Data Structures | Macros | Functions
lis3dh.h File Reference
Drivers » Sensor Device Drivers | Drivers » [S]ensor [A]ctuator [U]ber [L]ayer » LIS3DH accelerometer

Device driver interface for the LIS3DH accelerometer. More...

Detailed Description

Device driver interface for the LIS3DH accelerometer.

Author
Joakim Nohlgård joaki.nosp@m.m.no.nosp@m.hlgar.nosp@m.d@ei.nosp@m.stec..nosp@m.se

Definition in file lis3dh.h.

#include <stdint.h>
#include "periph/spi.h"
#include "periph/gpio.h"
+ Include dependency graph for lis3dh.h:
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Go to the source code of this file.

Data Structures

struct  lis3dh_params_t
 Configuration parameters for LIS3DH devices. More...
 
struct  lis3dh_t
 Device descriptor for LIS3DH sensors. More...
 
struct  lis3dh_data_t
 Result vector for accelerometer measurement. More...
 

Macros

#define LIS3DH_WHO_AM_I_RESPONSE   (0x33)
 Identifier register value.
 
#define LIS3DH_AXES_XYZ   (LIS3DH_CTRL_REG1_XYZEN_MASK)
 Convenience macro for enabling all axes.
 
#define LIS3DH_ADC_DATA_SIZE   (2U)
 Length of scalar measurement data in bytes.
 

Functions

int lis3dh_init (lis3dh_t *dev, const lis3dh_params_t *params)
 Initialize a LIS3DH sensor instance.
 
int lis3dh_read_xyz (const lis3dh_t *dev, lis3dh_data_t *acc_data)
 Read 3D acceleration data from the accelerometer.
 
int lis3dh_read_aux_adc1 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 1 data from the accelerometer.
 
int lis3dh_read_aux_adc2 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 2 data from the accelerometer.
 
int lis3dh_read_aux_adc3 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 3 data from the accelerometer.
 
int lis3dh_set_aux_adc (const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature)
 Turn on/off power to the auxiliary ADC in LIS3DH.
 
int lis3dh_set_axes (const lis3dh_t *dev, const uint8_t axes)
 Enable/disable accelerometer axes.
 
int lis3dh_set_fifo (const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark)
 Enable/disable the FIFO.
 
int lis3dh_set_odr (const lis3dh_t *dev, const uint8_t odr)
 Set the output data rate of the sensor.
 
int lis3dh_set_scale (lis3dh_t *dev, const uint8_t scale)
 Set the full scale range of the sensor.
 
int lis3dh_set_int1 (const lis3dh_t *dev, const uint8_t mode)
 Set INT1 pin function.
 
int lis3dh_get_fifo_level (const lis3dh_t *dev)
 Get the current number of elements in the FIFO.
 

LIS3DH hardware register addresses

#define LIS3DH_REG_STATUS_AUX   (0x07)
 
#define LIS3DH_REG_OUT_AUX_ADC1_L   (0x08)
 
#define LIS3DH_REG_OUT_AUX_ADC1_H   (0x09)
 
#define LIS3DH_REG_OUT_AUX_ADC2_L   (0x0A)
 
#define LIS3DH_REG_OUT_AUX_ADC2_H   (0x0B)
 
#define LIS3DH_REG_OUT_AUX_ADC3_L   (0x0C)
 
#define LIS3DH_REG_OUT_AUX_ADC3_H   (0x0D)
 
#define LIS3DH_REG_INT_COUNTER_REG   (0x0E)
 
#define LIS3DH_REG_WHO_AM_I   (0x0F)
 
#define LIS3DH_REG_TEMP_CFG_REG   (0x1F)
 
#define LIS3DH_REG_CTRL_REG1   (0x20)
 
#define LIS3DH_REG_CTRL_REG2   (0x21)
 
#define LIS3DH_REG_CTRL_REG3   (0x22)
 
#define LIS3DH_REG_CTRL_REG4   (0x23)
 
#define LIS3DH_REG_CTRL_REG5   (0x24)
 
#define LIS3DH_REG_CTRL_REG6   (0x25)
 
#define LIS3DH_REG_REFERENCE   (0x26)
 
#define LIS3DH_REG_STATUS_REG   (0x27)
 
#define LIS3DH_REG_OUT_X_L   (0x28)
 
#define LIS3DH_REG_OUT_X_H   (0x29)
 
#define LIS3DH_REG_OUT_Y_L   (0x2A)
 
#define LIS3DH_REG_OUT_Y_H   (0x2B)
 
#define LIS3DH_REG_OUT_Z_L   (0x2C)
 
#define LIS3DH_REG_OUT_Z_H   (0x2D)
 
#define LIS3DH_REG_FIFO_CTRL_REG   (0x2E)
 
#define LIS3DH_REG_FIFO_SRC_REG   (0x2F)
 
#define LIS3DH_REG_INT1_CFG   (0x30)
 
#define LIS3DH_REG_INT1_SOURCE   (0x31)
 
#define LIS3DH_REG_INT1_THS   (0x32)
 
#define LIS3DH_REG_INT1_DURATION   (0x33)
 
#define LIS3DH_REG_CLICK_CFG   (0x38)
 
#define LIS3DH_REG_CLICK_SRC   (0x39)
 
#define LIS3DH_REG_CLICK_THS   (0x3A)
 
#define LIS3DH_REG_TIME_LIMIT   (0x3B)
 
#define LIS3DH_REG_TIME_LATENCY   (0x3C)
 
#define LIS3DH_REG_TIME_WINDOW   (0x3D)
 

TEMP_CFG_REG bitfield macros

#define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK   (1 << 7)
 ADC enable.
 
#define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK   (1 << 6)
 Temperature sensor (T) enable.
 

CTRL_REG1 bitfield macros

#define LIS3DH_CTRL_REG1_ODR_SHIFT   (4)
 ODR global shift.
 
#define LIS3DH_CTRL_REG1_ODR3_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
 ODR fourth bit mask.
 
#define LIS3DH_CTRL_REG1_ODR2_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
 ODR third bit mask.
 
#define LIS3DH_CTRL_REG1_ODR1_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
 ODR second bit mask.
 
#define LIS3DH_CTRL_REG1_ODR0_MASK   (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 ODR first bit mask.
 
#define LIS3DH_CTRL_REG1_ODR_MASK
 Output data rate (ODR) selection bitfield.
 
#define LIS3DH_CTRL_REG1_LPEN_MASK   (1 << 3)
 Low power mode enable.
 
#define LIS3DH_CTRL_REG1_ZEN_SHIFT   (2)
 Z enable bit offset.
 
#define LIS3DH_CTRL_REG1_ZEN_MASK   (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)
 Z axis enable.
 
#define LIS3DH_CTRL_REG1_YEN_SHIFT   (1)
 Y enable bit offset.
 
#define LIS3DH_CTRL_REG1_YEN_MASK   (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)
 Y axis enable.
 
#define LIS3DH_CTRL_REG1_XEN_SHIFT   (0)
 X enable bit offset.
 
#define LIS3DH_CTRL_REG1_XEN_MASK   (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)
 X axis enable.
 
#define LIS3DH_CTRL_REG1_XYZEN_SHIFT   (0)
 XYZ enable bitfield offset.
 
#define LIS3DH_CTRL_REG1_XYZEN_MASK
 X, Y, Z enable bitfield mask.
 
#define LIS3DH_AXES_X   (LIS3DH_CTRL_REG1_XEN_MASK)
 enable X axis (Use when calling lis3dh_set_axes())
 
#define LIS3DH_AXES_Y   (LIS3DH_CTRL_REG1_YEN_MASK)
 enable Y axis (Use when calling lis3dh_set_axes())
 
#define LIS3DH_AXES_Z   (LIS3DH_CTRL_REG1_ZEN_MASK)
 enable Z axis (Use when calling lis3dh_set_axes())
 

CTRL_REG2 bitfield macros

#define LIS3DH_CTRL_REG2_HPM1_MASK   (1 << 7)
 High pass filter mode selection second bit.
 
#define LIS3DH_CTRL_REG2_HPM0_MASK   (1 << 6)
 High pass filter mode selection first bit.
 
#define LIS3DH_CTRL_REG2_HPCF2_MASK   (1 << 5)
 High pass filter cut off frequency selection second bit.
 
#define LIS3DH_CTRL_REG2_HPCF1_MASK   (1 << 4)
 High pass filter cut off frequency selection second bit.
 
#define LIS3DH_CTRL_REG2_FDS_MASK   (1 << 3)
 Filtered data selection.
 
#define LIS3DH_CTRL_REG2_HPCLICK_MASK   (1 << 2)
 High pass filter enabled for CLICK function.
 
#define LIS3DH_CTRL_REG2_HPIS2_MASK   (1 << 1)
 High pass filter enabled for AOI function on interrupt 2, second bit.
 
#define LIS3DH_CTRL_REG2_HPIS1_MASK   (1 << 0)
 High pass filter enabled for AOI function on interrupt 2, first bit.
 

CTRL_REG3 bitfield macros

#define LIS3DH_CTRL_REG3_I1_CLICK_MASK   (1 << 7)
 CLICK interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_AOI1_MASK   (1 << 6)
 AOI1 interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_AOI2_MASK   (1 << 5)
 AOI2 interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_DRDY1_MASK   (1 << 4)
 DRDY1 interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_DRDY2_MASK   (1 << 3)
 DRDY2 interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_WTM_MASK   (1 << 2)
 FIFO Watermark interrupt on INT1.
 
#define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK   (1 << 1)
 FIFO Overrun interrupt on INT1.
 

CTRL_REG4 bitfield macros

#define LIS3DH_CTRL_REG4_BDU_MASK   (1 << 7)
 Block data update (BDU) bit mask.
 
#define LIS3DH_CTRL_REG4_BDU_ENABLE   (LIS3DH_CTRL_REG4_BDU_MASK)
 Block data update (BDU) enable.
 
#define LIS3DH_CTRL_REG4_BDU_DISABLE   (0)
 Block data update (BDU) disable.
 
#define LIS3DH_CTRL_REG4_BLE_MASK   (1 << 6)
 Big/little endian bit mask.
 
#define LIS3DH_CTRL_REG4_BLE_LITTLE_ENDIAN   (0)
 Big/little endian little endian mode.
 
#define LIS3DH_CTRL_REG4_BLE_BIG_ENDIAN   (LIS3DH_CTRL_REG4_BLE_MASK)
 Big/little endian big endian mode.
 
#define LIS3DH_CTRL_REG4_FS1_MASK   (1 << 5)
 Full scale selection mask second bit.
 
#define LIS3DH_CTRL_REG4_FS0_MASK   (1 << 4)
 Full scale selection mask first bit.
 
#define LIS3DH_CTRL_REG4_FS_MASK
 Full scale selection mask.
 
#define LIS3DH_CTRL_REG4_SCALE_2G   (0)
 Scale register value: +/- 2G.
 
#define LIS3DH_CTRL_REG4_SCALE_4G   (LIS3DH_CTRL_REG4_FS0_MASK)
 Scale register value: +/- 4G.
 
#define LIS3DH_CTRL_REG4_SCALE_8G   (LIS3DH_CTRL_REG4_FS1_MASK)
 Scale register value: +/- 8G.
 
#define LIS3DH_CTRL_REG4_SCALE_16G   (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
 Scale: +/- 16G.
 
#define LIS3DH_CTRL_REG4_HR_MASK   (1 << 3)
 High resolution output mode.
 
#define LIS3DH_CTRL_REG4_ST1_MASK   (1 << 2)
 Self test enable second bit mask.
 
#define LIS3DH_CTRL_REG4_ST0_MASK   (1 << 1)
 Self test enable first bit mask.
 
#define LIS3DH_CTRL_REG4_SIM_MASK   (1 << 0)
 SPI serial interface mode selection.
 
#define LIS3DH_CTRL_REG5_REBOOT_MASK   (1 << 7)
 Reboot memory content.
 
#define LIS3DH_CTRL_REG5_FIFO_EN_MASK   (1 << 6)
 FIFO enable.
 
#define LIS3DH_CTRL_REG5_LIR_I1_MASK   (1 << 3)
 Latch interrupt request on INT1.
 
#define LIS3DH_CTRL_REG5_D4D_I1_MASK   (1 << 2)
 4D enable
 

STATUS_REG bitfield macros

#define LIS3DH_STATUS_REG_ZYXOR_MASK   (1 << 7)
 X, Y or Z axis data overrun.
 
#define LIS3DH_STATUS_REG_ZOR_MASK   (1 << 6)
 Z axis data overrun.
 
#define LIS3DH_STATUS_REG_YOR_MASK   (1 << 5)
 Y axis data overrun.
 
#define LIS3DH_STATUS_REG_XOR_MASK   (1 << 4)
 X axis data overrun.
 
#define LIS3DH_STATUS_REG_ZYXDA_MASK   (1 << 3)
 X, Y or Z axis new data available.
 
#define LIS3DH_STATUS_REG_ZDA_MASK   (1 << 2)
 Z axis new data available.
 
#define LIS3DH_STATUS_REG_YDA_MASK   (1 << 1)
 Y axis new data available.
 
#define LIS3DH_STATUS_REG_XDA_MASK   (1 << 0)
 X axis new data available.
 

FIFO_CTRL_REG bitfield macros

#define LIS3DH_FIFO_CTRL_REG_FM_SHIFT   (6)
 
#define LIS3DH_FIFO_CTRL_REG_FM1_MASK   (1 << 7)
 
#define LIS3DH_FIFO_CTRL_REG_FM0_MASK   (1 << 6)
 
#define LIS3DH_FIFO_CTRL_REG_FM_MASK
 
#define LIS3DH_FIFO_CTRL_REG_TR_MASK   (1 << 5)
 
#define LIS3DH_FIFO_CTRL_REG_FTH4_MASK   (1 << 4)
 
#define LIS3DH_FIFO_CTRL_REG_FTH3_MASK   (1 << 3)
 
#define LIS3DH_FIFO_CTRL_REG_FTH2_MASK   (1 << 2)
 
#define LIS3DH_FIFO_CTRL_REG_FTH1_MASK   (1 << 1)
 
#define LIS3DH_FIFO_CTRL_REG_FTH0_MASK   (1 << 0)
 
#define LIS3DH_FIFO_CTRL_REG_FTH_SHIFT   (0)
 
#define LIS3DH_FIFO_CTRL_REG_FTH_MASK
 

FIFO_SRC_REG bitfield macros

#define LIS3DH_FIFO_SRC_REG_WTM_MASK   (1 << 7)
 
#define LIS3DH_FIFO_SRC_REG_OVRN_FIFO_MASK   (1 << 6)
 
#define LIS3DH_FIFO_SRC_REG_EMPTY_MASK   (1 << 5)
 
#define LIS3DH_FIFO_SRC_REG_FSS4_MASK   (1 << 4)
 
#define LIS3DH_FIFO_SRC_REG_FSS3_MASK   (1 << 3)
 
#define LIS3DH_FIFO_SRC_REG_FSS2_MASK   (1 << 2)
 
#define LIS3DH_FIFO_SRC_REG_FSS1_MASK   (1 << 1)
 
#define LIS3DH_FIFO_SRC_REG_FSS0_MASK   (1 << 0)
 
#define LIS3DH_FIFO_SRC_REG_FSS_SHIFT   (0)
 
#define LIS3DH_FIFO_SRC_REG_FSS_MASK
 

Register address bitfield macros

#define LIS3DH_SPI_WRITE_MASK   (0 << 7)
 Write to register.
 
#define LIS3DH_SPI_READ_MASK   (1 << 7)
 The READ bit must be set when reading.
 
#define LIS3DH_SPI_MULTI_MASK   (1 << 6)
 Multi byte transfers must assert this bit when writing the address.
 
#define LIS3DH_SPI_SINGLE_MASK   (0 << 6)
 Opposite of LIS3DH_SPI_MULTI_MASK.
 
#define LIS3DH_SPI_ADDRESS_MASK   (0x3F)
 Mask of the address bits in the address byte during transfers.
 

FIFO modes.

Used when calling lis3dh_set_fifo()

#define LIS3DH_FIFO_MODE_BYPASS   (0x00 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Bypass.
 
#define LIS3DH_FIFO_MODE_FIFO   (0x01 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: FIFO.
 
#define LIS3DH_FIFO_MODE_STREAM   (0x02 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Stream.
 
#define LIS3DH_FIFO_MODE_STREAM_TO_FIFO   (0x03 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Stream to FIFO.
 

Output Data Rates (ODR) macros

Use these when calling lis3dh_set_odr(odr).

#define LIS3DH_ODR_POWERDOWN   (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Powerdown mode.
 
#define LIS3DH_ODR_1Hz   (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 1Hz mode
 
#define LIS3DH_ODR_10Hz   (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 10Hz mode
 
#define LIS3DH_ODR_25Hz   (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 25Hz mode
 
#define LIS3DH_ODR_50Hz   (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 50Hz mode
 
#define LIS3DH_ODR_100Hz   (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 100Hz mode
 
#define LIS3DH_ODR_200Hz   (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 200Hz mode
 
#define LIS3DH_ODR_400Hz   (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 400Hz mode
 
#define LIS3DH_ODR_LP1600Hz   (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Low power 1600Hz mode.
 
#define LIS3DH_ODR_NP1250Hz   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Normal mode 1250 Hz.
 
#define LIS3DH_ODR_LP5000HZ   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Low power mode 5000 Hz.