Loading...
Searching...
No Matches
cpu_conf.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2020 Philipp-Alexander Blum <philipp-blum@jakiku.de>
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
24#ifndef CPU_CONF_H
25#define CPU_CONF_H
26
27#include "cpu_conf_common.h"
28
29#ifdef CPU_MODEL_NRF52832XXAA
30#include "vendor/nrf52.h"
31#include "vendor/nrf52_bitfields.h"
32#include "vendor/nrf52832_peripherals.h"
33#elif defined(CPU_MODEL_NRF52805XXAA)
34#include "vendor/nrf52805.h"
35#include "vendor/nrf52805_bitfields.h"
36#include "vendor/nrf52805_peripherals.h"
37#elif defined(CPU_MODEL_NRF52810XXAA)
38#include "vendor/nrf52810.h"
39#include "vendor/nrf52810_bitfields.h"
40#include "vendor/nrf52810_peripherals.h"
41#elif defined(CPU_MODEL_NRF52811XXAA)
42#include "vendor/nrf52811.h"
43#include "vendor/nrf52811_bitfields.h"
44#include "vendor/nrf52811_peripherals.h"
45#elif defined(CPU_MODEL_NRF52820XXAA)
46#include "vendor/nrf52820.h"
47#include "vendor/nrf52820_bitfields.h"
48#include "vendor/nrf52820_peripherals.h"
49#elif defined(CPU_MODEL_NRF52833XXAA)
50#include "vendor/nrf52833.h"
51#include "vendor/nrf52833_bitfields.h"
52#include "vendor/nrf52833_peripherals.h"
53#elif defined(CPU_MODEL_NRF52840XXAA)
54#include "vendor/nrf52840.h"
55#include "vendor/nrf52840_bitfields.h"
56#include "vendor/nrf52840_peripherals.h"
57#else
58#error "The CPU_MODEL of your board is currently not supported"
59#endif
60
61#ifdef __cplusplus
62extern "C" {
63#endif
64
69#define CPU_DEFAULT_IRQ_PRIO (2U)
70#define CPU_FLASH_BASE (0x00000000)
71
72#if defined(CPU_MODEL_NRF52805XXAA)
73#define CPU_IRQ_NUMOF (26U)
74#elif defined(CPU_MODEL_NRF52810XXAA)
75#define CPU_IRQ_NUMOF (30U)
76#elif defined(CPU_MODEL_NRF52811XXAA)
77#define CPU_IRQ_NUMOF (30U)
78#elif defined(CPU_MODEL_NRF52820XXAA)
79#define CPU_IRQ_NUMOF (40U)
80#elif defined(CPU_MODEL_NRF52832XXAA)
81#define CPU_IRQ_NUMOF (39U)
82#elif defined(CPU_MODEL_NRF52833XXAA)
83#define CPU_IRQ_NUMOF (48U)
84#elif defined(CPU_MODEL_NRF52840XXAA)
85#define CPU_IRQ_NUMOF (48U)
86#endif
93#ifdef BPROT_PRESENT
94#define FLASHPAGE_SIZE BPROT_REGIONS_SIZE
95#define FLASHPAGE_NUMOF BPROT_REGIONS_NUM
96#elif defined(CPU_MODEL_NRF52820XXAA)
97#define FLASHPAGE_SIZE (4096U)
98#define FLASHPAGE_NUMOF (64U)
99#elif defined(CPU_MODEL_NRF52833XXAA)
100#define FLASHPAGE_SIZE (4096U)
101#define FLASHPAGE_NUMOF (128U)
102#elif defined(CPU_MODEL_NRF52840XXAA)
103#define FLASHPAGE_SIZE (4096U)
104#define FLASHPAGE_NUMOF (256U)
105#endif
106
107/* The minimum block size which can be written is 4B. However, the erase
108 * block is always FLASHPAGE_SIZE.
109 */
110#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
111/* Writing should be always 4 bytes aligned */
112#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
115#ifdef CPU_MODEL_NRF52840XXAA
121/* Taken from OpenWSN @32.768Hz */
122#define PORT_maxTxDataPrepare (400/PORT_US_PER_TICK)
123#define PORT_maxRxAckPrepare (400/PORT_US_PER_TICK)
124#define PORT_maxRxDataPrepare (400/PORT_US_PER_TICK)
125#define PORT_maxTxAckPrepare (400/PORT_US_PER_TICK)
126/* Measured 220us */
127#define PORT_delayTx (300/PORT_US_PER_TICK)
128#define PORT_delayRx (150/PORT_US_PER_TICK)
130#endif
131
135static inline void nrf52_sleep(void)
136{
137 __SEV();
138 __WFE();
139 __asm("nop");
140}
141
142#ifdef __cplusplus
143}
144#endif
145
146#endif /* CPU_CONF_H */
static void nrf52_sleep(void)
Put the CPU in the low-power 'wait for event' state.
Definition cpu_conf.h:135