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vectors_cortexm.h File Reference

Default interrupt vectors shared by Cortex-M based CPUs. More...

Detailed Description

Default interrupt vectors shared by Cortex-M based CPUs.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file vectors_cortexm.h.

#include "cpu_conf.h"
+ Include dependency graph for vectors_cortexm.h:
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Go to the source code of this file.

Data Structures

struct  cortexm_base_t
 Structure of Cortex-M basic vector table. More...
 
#define WEAK_DEFAULT   __attribute__((weak,alias("dummy_handler")))
 Use this macro to make interrupt functions overridable with the dummy_handler as fallback in case they are not implemented.
 
#define ISR_VECTOR(x)   __attribute__((used,section(".vectors." # x )))
 Use this macro to define the parts of the vector table.
 
#define CPU_NONISR_EXCEPTIONS   (15)
 Number of Cortex-M non-ISR exceptions.
 
typedef void(* isr_t) (void)
 All ISR functions have this type.
 
void reset_handler_default (void)
 This function is the default entry point after a system reset.
 
void nmi_handler (void)
 Non-maskable interrupt handler.
 
void hard_fault_default (void)
 Hard fault exception handler.
 
void dummy_handler_default (void)
 Default handler used as weak alias for not implemented ISR vectors.
 

Macro Definition Documentation

◆ CPU_NONISR_EXCEPTIONS

#define CPU_NONISR_EXCEPTIONS   (15)

Number of Cortex-M non-ISR exceptions.

This means those that are no hardware interrupts, or the ones with a negative interrupt number.

Definition at line 49 of file vectors_cortexm.h.

◆ ISR_VECTOR

#define ISR_VECTOR (   x)    __attribute__((used,section(".vectors." # x )))

Use this macro to define the parts of the vector table.

The entries in the vector table are sorted in ascending order defined by the (numeric) value given for x. The Cortex-M base vectors are always defined with ISR_VECTOR(0), so the CPU specific vector(s) must start from 1.

Definition at line 41 of file vectors_cortexm.h.

◆ WEAK_DEFAULT

#define WEAK_DEFAULT   __attribute__((weak,alias("dummy_handler")))

Use this macro to make interrupt functions overridable with the dummy_handler as fallback in case they are not implemented.

Definition at line 32 of file vectors_cortexm.h.

Typedef Documentation

◆ isr_t

typedef void(* isr_t) (void)

All ISR functions have this type.

Definition at line 54 of file vectors_cortexm.h.

Function Documentation

◆ dummy_handler_default()

void dummy_handler_default ( void  )

Default handler used as weak alias for not implemented ISR vectors.

Per default, all interrupt handlers are mapped to the dummy handler using a weak symbol. This means the handlers can be (should be) overwritten in the RIOT code by just implementing a function with the name of the targeted interrupt routine.

◆ hard_fault_default()

void hard_fault_default ( void  )

Hard fault exception handler.

Hard faults are triggered on errors during exception processing. Typical causes of hard faults are access to un-aligned pointers on Cortex-M0 CPUs and calls of function pointers that are set to NULL.

◆ nmi_handler()

void nmi_handler ( void  )

Non-maskable interrupt handler.

Non-maskable interrupts have the highest priority other than the reset event and can not be masked (surprise surprise...). They can be triggered by software and some peripherals. So far, they are not used in RIOT.

◆ reset_handler_default()

void reset_handler_default ( void  )

This function is the default entry point after a system reset.

After a system reset, the following steps are necessary and carried out:

  1. load data section from flash to ram
  2. overwrite uninitialized data section (BSS) with zeros
  3. initialize the board (sync clock, setup std-IO)
  4. initialize the newlib (optional, on when newlib is used)
  5. initialize and start RIOTs kernel