20#include "periph_cpu.h"
27#define CLOCK_CORECLOCK (7372800U)
34 .lfxt1_frequency = 32768,
53#define UART0_RX_ISR (USART1RX_VECTOR)
54#define UART0_TX_ISR (USART1TX_VECTOR)
56#define UART_NUMOF ARRAY_SIZE(uart_config)
69#define SPI_NUMOF ARRAY_SIZE(spi_config)
#define CLOCK_CORECLOCK
Clock configuration.
static const msp430_clock_params_t clock_params
Clock configuration.
Common timer configuration for TIMER_A clocked by SMCLK and TIMER_B clocked by ACLK.
@ MAIN_CLOCK_SOURCE_XT2CLK
High frequency crystal between 450 kHz and 8 MHz.
@ SUBMAIN_CLOCK_SOURCE_XT2CLK
High frequency crystal between 450 kHz and 8 MHz.
@ SUBMAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ AUXILIARY_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ MAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
const msp430_usart_uart_params_t usart1_as_uart
MSP430 x1xx USART1 in UART configuration.
const msp430_usart_spi_params_t usart0_as_spi
MSP430 x1xx USART0 in SPI configuration.
MSP430Fxzy Basic Clock System Parameters.
SPI device configuration.
UART device configuration.