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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2019 Inria
3 * SPDX-FileCopyrightText: 2019 Freie Universität Berlin
4 * SPDX-FileCopyrightText: 2019 Kaspar Schleiser <kaspar@schleiser.de>
5 * SPDX-License-Identifier: LGPL-2.1-only
6 */
7
8#pragma once
9
20
21#include "periph_cpu.h"
22#include "cfg_clock_32_1.h"
23#include "cfg_rtt_default.h"
24#include "cfg_timer_default.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
34static const spi_conf_t spi_config[] = {
35 {
36 .dev = NRF_SPIM0,
37 .sclk = GPIO_PIN(0, 2),
38 .mosi = GPIO_PIN(0, 3),
39 .miso = GPIO_PIN(0, 4),
40 .ppi = 0,
41 }
42};
43
44#define SPI_NUMOF ARRAY_SIZE(spi_config)
46
51static const i2c_conf_t i2c_config[] = {
52 {
53 .dev = NRF_TWIM1,
54 .scl = GPIO_PIN(0, 7),
55 .sda = GPIO_PIN(0, 6),
56 .speed = I2C_SPEED_FAST
57 }
58};
59
60#define I2C_NUMOF ARRAY_SIZE(i2c_config)
62
63#ifdef __cplusplus
64}
65#endif
66
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336