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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014 INRIA
3 * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#include "macros/units.h"
21#include "periph_cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#define CLOCK_CORECLOCK msp430_dco_freq
29
34 .target_dco_frequency = MHZ(8),
35 .lfxt1_frequency = 32768,
36 .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
37 .submain_clock_source = SUBMAIN_CLOCK_SOURCE_DCOCLK,
38 .main_clock_divier = MAIN_CLOCK_DIVIDE_BY_1,
39 .submain_clock_divier = SUBMAIN_CLOCK_DIVIDE_BY_1,
40 .auxiliary_clock_divier = AUXILIARY_CLOCK_DIVIDE_BY_1,
41};
42
47static const uart_conf_t uart_config[] = {
48 {
49 .uart = &usci_a0_as_uart,
50 },
51};
52
53#define UART0_RX_ISR USCIAB0RX_VECTOR
54
55#define UART_NUMOF ARRAY_SIZE(uart_config)
57
62static const spi_conf_t spi_config[] = {
63 {
64 .spi = &usci_b0_as_spi,
65 },
66};
67
68#define SPI_NUMOF ARRAY_SIZE(spi_config)
70
71#ifdef __cplusplus
72}
73#endif
74
static const msp430_clock_params_t clock_params
Clock configuration.
Definition periph_conf.h:33
Common timer configuration for TIMER_A clocked by SMCLK and TIMER_B clocked by ACLK.
const msp430_usci_spi_params_t usci_b0_as_spi
MSP430 F2xx/G2xx USCI B0 in SPI configuration.
const msp430_usci_uart_params_t usci_a0_as_uart
MSP430 F2xx/G2xx USCI A0 in UART configuration.
@ MAIN_CLOCK_SOURCE_DCOCLK
Internal digitally controlled oscillator (DCO) with RC-type characteristics.
@ SUBMAIN_CLOCK_SOURCE_DCOCLK
Internal digitally controlled oscillator (DCO) with RC-type characteristics.
@ SUBMAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ AUXILIARY_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
@ MAIN_CLOCK_DIVIDE_BY_1
Divide the main clock by 1.
MSP430Fxzy Basic Clock System Parameters.
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition units.h:48