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cfg_timer_a_smclk_b_aclk.h
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1/*
2 * Copyright (C) 2023 Otto-von-Guericke-Universität Magdeburg
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef CFG_TIMER_A_SMCLK_B_ACLK_H
21#define CFG_TIMER_A_SMCLK_B_ACLK_H
22
23#include "periph_cpu.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
36static const timer_conf_t timer_conf[] = {
37 {
38 .timer = &TIMER_A,
39 .irq_flags = &TIMER_A_IRQFLAGS,
41 },
42 {
43 .timer = &TIMER_B,
44 .irq_flags = &TIMER_B_IRQFLAGS,
46 }
47};
48#define TIMER_NUMOF ARRAY_SIZE(timer_conf)
50#define TIMER0_ISR_CC0 (TIMERA0_VECTOR)
51#define TIMER0_ISR_CCX (TIMERA1_VECTOR)
52#define TIMER1_ISR_CC0 (TIMERB0_VECTOR)
53#define TIMER1_ISR_CCX (TIMERB1_VECTOR)
56#ifdef __cplusplus
57}
58#endif
59
60#endif /* CFG_TIMER_A_SMCLK_B_ACLK_H */
static const timer_conf_t timer_conf[]
Timer configuration.
msp430_timer_t TIMER_A
Register map of the timer A control registers.
msp430_timer_t TIMER_B
Register map of the timer B control registers.
REG16 TIMER_B_IRQFLAGS
IRQ flags for TIMER_B.
REG16 TIMER_A_IRQFLAGS
IRQ flags for TIMER_A.
@ TIMER_CLOCK_SOURCE_AUXILIARY_CLOCK
Auxiliary clock as clock source.
@ TIMER_CLOCK_SOURCE_SUBMAIN_CLOCK
Sub-system master clock as clock source.
Timer device configuration.
Definition periph_cpu.h:264
timer_dev_t timer
the higher numbered timer
Definition periph_cpu.h:558