Common configuration for STM32 Timer peripheral based on TIM5 and TIM2. More...
Common configuration for STM32 Timer peripheral based on TIM5 and TIM2.
Definition in file cfg_timer_tim5_and_tim2.h.
#include "periph_cpu.h"
Go to the source code of this file.
Timer configuration | |
#define | TIMER_0_ISR isr_tim5 |
IRQ of timer at idx 0. | |
#define | TIMER_1_ISR isr_tim2 |
IRQ of timer at idx 1. | |
#define | TIMER_NUMOF ARRAY_SIZE(timer_config) |
static const timer_conf_t | timer_config [] |
#define TIMER_0_ISR isr_tim5 |
IRQ of timer at idx 0.
Definition at line 67 of file cfg_timer_tim5_and_tim2.h.
#define TIMER_1_ISR isr_tim2 |
IRQ of timer at idx 1.
Definition at line 68 of file cfg_timer_tim5_and_tim2.h.
#define TIMER_NUMOF ARRAY_SIZE(timer_config) |
Definition at line 70 of file cfg_timer_tim5_and_tim2.h.
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static |
Definition at line 33 of file cfg_timer_tim5_and_tim2.h.