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sdkconfig.h
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1/*
2 * SPDX-FileCopyrightText: 2022 Gunar Schorcht
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
20
21/*
22 * The SoC capability definitions are often included indirectly in the
23 * ESP-IDF files, although all ESP-IDF files require them. Since not all
24 * ESP-IDF header files are included in RIOT, the SoC capability definitions
25 * are unknown if they are only indirectly included. Therefore, the SoC
26 * capabilities are included in this file and are thus available to all
27 * ESP-IDF files. This avoids to update vendor code.
28 */
29#ifndef LD_FILE_GEN
30# include "soc/soc_caps.h"
31#endif
32
38#if !defined(IDF_VER)
39# include "esp_idf_ver.h"
40#endif
41
42#ifndef DOXYGEN
43
50#ifdef CONFIG_CONSOLE_UART_NUM
51# define CONFIG_ESP_CONSOLE_UART_NUM CONFIG_CONSOLE_UART_NUM
52#else
53# define CONFIG_ESP_CONSOLE_UART_NUM 0
54#endif
55#define CONFIG_ESP_CONSOLE_UART_BAUDRATE STDIO_UART_BAUDRATE
56
57#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM
58
62#ifndef CONFIG_LOG_DEFAULT_LEVEL
63# define CONFIG_LOG_DEFAULT_LEVEL LOG_LEVEL
64#endif
65#define CONFIG_LOG_MAXIMUM_LEVEL LOG_LEVEL
66
70#if MODULE_NEWLIB_NANO
71# define CONFIG_NEWLIB_NANO_FORMAT 1
72#endif
73
74#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
75#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
76#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2560
77#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
78
79#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
80#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584
81#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
82#define CONFIG_ESP_TIMER_TASK_AFFINITY 0
83#define CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0 1
84
85#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
86
87#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
88#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
89#define CONFIG_APP_BUILD_BOOTLOADER 1
90#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
91#define CONFIG_APP_COMPILE_TIME_DATE 1
92#define CONFIG_APP_EXCLUDE_PROJECT_VER_VAR 1
93#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 9
94
95#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
96#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
97#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
98#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
99
103#if MODULE_ESP_BLE
104# define CONFIG_BT_ENABLED 1
105# define CONFIG_BT_CONTROLLER_ENABLED 1
106# define CONFIG_BT_CONTROLLER_ONLY 1
107# define CONFIG_SOC_BT_SUPPORTED SOC_BT_SUPPORTED
108# define CONFIG_SOC_PM_SUPPORT_BT_PD SOC_PM_SUPPORT_BT_PD
109# define CONFIG_SOC_PM_SUPPORT_BT_WAKEUP SOC_PM_SUPPORT_BT_WAKEUP
110#endif
111
115#if MODULE_ESP_IEEE802154
116# define CONFIG_IEEE802154_ENABLED 1
117# define CONFIG_IEEE802154_CCA_ED 1
118# define CONFIG_IEEE802154_CCA_MODE 1
119# define CONFIG_IEEE802154_CCA_THRESHOLD -60
120# define CONFIG_IEEE802154_PENDING_TABLE_SIZE 20
121# define CONFIG_IEEE802154_RX_BUFFER_SIZE 20
122#endif
123
127#if MODULE_ESP_SPI_RAM
128# define CONFIG_SPIRAM 1
129# define CONFIG_SPIRAM_TYPE_AUTO 1
130# define CONFIG_SPIRAM_SIZE -1
131# define CONFIG_SPIRAM_SPEED_40M 1
132# define CONFIG_SPIRAM_SPEED 40
133# define CONFIG_SPIRAM_BOOT_INIT 1
134# define CONFIG_SPIRAM_USE_MALLOC 1 /* using malloc requires QStaticQueue */
135# define CONFIG_SPIRAM_USE_CAPS_ALLOC 0 /* using cap instead of malloc */
136# define CONFIG_SPIRAM_MEMTEST 1
137# define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384
138# define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768
139# define CONFIG_SOC_SPIRAM_SUPPORTED SOC_SPIRAM_SUPPORTED
140# define CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND 1
141#endif
142
146#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
147#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
148#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
149#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
150#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
151#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
152#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
153#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
154#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
155#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
156#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
157#define CONFIG_SPI_FLASH_SUPPORT_TH_CHIP 1
158#define CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP 1
159
163#if MODULE_ESP_RTC_TIMER_32K
164# define CONFIG_RTC_CLK_SRC_EXT_CRYS 1
165#else
166# define CONFIG_RTC_CLK_SRC_INT_RC 1
167#endif
168
172#if MODULE_ESP_ETH
173# define CONFIG_ETH_ENABLED 1
174#endif
175
179#if !defined(CONFIG_FLASHMODE_DOUT) && \
180 !defined(CONFIG_FLASHMODE_DIO) && \
181 !defined(CONFIG_FLASHMODE_QOUT) && \
182 !defined(CONFIG_FLASHMODE_QIO)
183# error "Flash mode not configured"
184#endif
185
189#if MODULE_ESP_WIFI_ANY
190# define CONFIG_ESP_WIFI_ENABLED 1
191# define CONFIG_ESP_WIFI_AMPDU_RX_ENABLED 1
192# define CONFIG_ESP_WIFI_AMPDU_TX_ENABLED 1
193# define CONFIG_ESP_WIFI_AUTH_WPA2_PSK 1
194# define CONFIG_ESP_WIFI_CACHE_TX_BUFFER_NUM 32
195# define CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM 32
196# define CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF 0
197# define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER 1
198# define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM 32
199# define CONFIG_ESP_WIFI_ENABLE_SAE_PK 0 /* default 1 for WPA3 */
200# define CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA 0 /* default 1 for WPA3 */
201# define CONFIG_ESP_WIFI_ENABLE_WPA3_SAE 0 /* default 1 for WPA3 */
202# define CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM 7
203# define CONFIG_ESP_WIFI_GMAC_SUPPORT 1
204# define CONFIG_ESP_WIFI_IRAM_OPT 0 /* default 1 */
205# define CONFIG_ESP_WIFI_MBEDTLS_CRYPTO 0 /* default 1 for WPA3 */
206# define CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT 0 /* default 1 for WPA3 */
207# define CONFIG_ESP_WIFI_MGMT_SBUF_NUM 32
208# define CONFIG_ESP_WIFI_NVS_ENABLED MODULE_ESP_IDF_NVS_FLASH
209# define CONFIG_ESP_WIFI_PW_ID ""
210# define CONFIG_ESP_WIFI_RX_BA_WIN 6
211# define CONFIG_ESP_WIFI_RX_IRAM_OPT 0 /* default 1 */
212# define CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF 5
213# define CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN 752
214# define CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE 1
215# define CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM 10
216# define CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER 1
217# define CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 1
218# define CONFIG_ESP_WIFI_TX_BA_WIN 6
219# define CONFIG_ESP_WIFI_TX_BUFFER_TYPE 1
220
221# define CONFIG_CRYPTO_INTERNAL 1
222
223# if MODULE_ESP_WIFI_AP || MODULE_ESP_NOW
224# define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
225# endif
226
227# if MODULE_ESP_WIFI_ENTERPRISE
228# define CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT 1
229# endif
230
231#endif
232
233#define CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME 10
234#define CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME 50
235#define CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME 15
236
240#if SOC_PHY_SUPPORTED
241# define CONFIG_ESP_PHY_ENABLED 1
242# define CONFIG_ESP_PHY_CALIBRATION_MODE 0
243# define CONFIG_ESP_PHY_MAX_TX_POWER 20
244# define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
245# define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
246# if MODULE_ESP_IDF_NVS_FLASH
247# define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
248# endif
249#endif
250
254#if !SOC_WIRELESS_HOST_SUPPORTED
255# define CONFIG_ESP_COEX_ENABLED 1
256 /*
257 * As in ESP-IDF, the software coexistence is enabled if at least two
258 * of the radio modules WiFi, BT and IEEE 802.15.4 are used. For WiFi
259 * and IEEE 802.15.4 it is even required, since the IEEE 802.15.4 radio
260 * blocks the RF in receive mode otherwise.
261 */
262# if (CONFIG_ESP_WIFI_ENABLED && CONFIG_BT_ENABLED) || \
263 (CONFIG_ESP_WIFI_ENABLED && CONFIG_IEEE802154_ENABLED) || \
264 (CONFIG_IEEE802154_ENABLED && CONFIG_BT_ENABLED)
265# define CONFIG_ESP_COEX_SW_COEXIST_ENABLE 1
266 /*
267 * CONFIG_SW_COEXIST_ENABLE is the deprecated name of this option,
268 * which is still used by ESP-IDF code. As in the sdkconfig.h generated
269 * by ESP-IDF, it is defined as alias.
270 */
271# define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP_COEX_SW_COEXIST_ENABLE
272# if CONFIG_IEEE802154_ENABLED
273 /* required for the declaration of the IEEE 802.15.4 coexistence API */
274# define CONFIG_SOC_IEEE802154_SUPPORTED SOC_IEEE802154_SUPPORTED
275# endif
276# endif
277#endif /* !SOC_WIRELESS_HOST_SUPPORTED */
278
282#ifndef CONFIG_ESP_FLASHPAGE_CAPACITY
283
284#if MODULE_PERIPH_FLASHPAGE
285# if CONFIG_ESP_FLASHPAGE_CAPACITY_64K
286# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x10000
287# elif CONFIG_ESP_FLASHPAGE_CAPACITY_128K
288# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x20000
289# elif CONFIG_ESP_FLASHPAGE_CAPACITY_256K
290# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x40000
291# elif CONFIG_ESP_FLASHPAGE_CAPACITY_512K
292# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000
293# elif CONFIG_ESP_FLASHPAGE_CAPACITY_1M
294# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x100000
295# elif CONFIG_ESP_FLASHPAGE_CAPACITY_2M
296# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x200000
297# else
298# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x80000
299# endif
300#else /* MODULE_PERIPH_FLASHPAGE */
301# define CONFIG_ESP_FLASHPAGE_CAPACITY 0x0
302#endif /* MODULE_PERIPH_FLASHPAGE */
303
304#endif /* !CONFIG_ESP_FLASHPAGE_CAPACITY */
305
309#if MODULE_ESP_IDF_LCD
310# ifndef CONFIG_LCD_DATA_BUF_SIZE
311# define CONFIG_LCD_DATA_BUF_SIZE 512
312# endif
313# define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE CONFIG_LCD_DATA_BUF_SIZE
314#endif
315
319#if defined(CPU_FAM_ESP32)
320# include "sdkconfig_esp32.h"
321#elif defined(CPU_FAM_ESP32C3)
322# include "sdkconfig_esp32c3.h"
323#elif defined(CPU_FAM_ESP32C6)
324# include "sdkconfig_esp32c6.h"
325#elif defined(CPU_FAM_ESP32H2)
326# include "sdkconfig_esp32h2.h"
327#elif defined(CPU_FAM_ESP32S2)
328# include "sdkconfig_esp32s2.h"
329#elif defined(CPU_FAM_ESP32S3)
330# include "sdkconfig_esp32s3.h"
331#else
332# error "ESP32x family implementation missing"
333#endif
334
335#ifndef CONFIG_MMU_PAGE_SIZE
336# define CONFIG_MMU_PAGE_SIZE_64KB 1
337# define CONFIG_MMU_PAGE_SIZE 0x10000
338#endif
339
340#ifndef CONFIG_FREERTOS_NUMBER_OF_CORES
341# define CONFIG_FREERTOS_NUMBER_OF_CORES 1
342#endif
343
344#define CONFIG_ESP_DEBUG_OCDAWARE 1
345
346#define CONFIG_ADC_SUPPRESS_DEPRECATE_WARN 1
347
348#define CONFIG_HEAP_POISONING_DISABLED 1
349#define CONFIG_HEAP_TRACING_OFF 1
350#define CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP 1
351
352#define CONFIG_ULP_COPROC_RESERVE_MEM 0
353
354#ifdef SOC_RTC_MEM_SUPPORTED
355# define CONFIG_SOC_RTC_MEM_SUPPORTED 1
356#endif
357#ifdef SOC_RTC_FAST_MEM_SUPPORTED
358# define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1
359#endif
360#ifdef SOC_RTC_SLOW_SUPPORTED
361# define CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED 1
362#endif
363
367#ifdef SOC_SDMMC_HOST_SUPPORTED
368# define CONFIG_SOC_SDMMC_HOST_SUPPORTED SOC_SDMMC_HOST_SUPPORTED
369# define CONFIG_SOC_SDMMC_DELAY_PHASE_NUM SOC_SDMMC_DELAY_PHASE_NUM
370# define CONFIG_SOC_SDMMC_NUM_SLOTS SOC_SDMMC_NUM_SLOTS
371# define CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK SOC_SDMMC_SUPPORT_XTAL_CLOCK
372# define CONFIG_SOC_SDMMC_USE_GPIO_MATRIX SOC_SDMMC_USE_GPIO_MATRIX
373# define CONFIG_SOC_SDMMC_USE_IOMUX SOC_SDMMC_USE_IOMUX
374#endif /* SOC_SDMMC_HOST_SUPPORTED */
375
379#ifdef SOC_USB_SERIAL_JTAG_SUPPORTED
380# ifndef CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
381# define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
382# endif
383# ifndef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
384# define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG 0
385# endif
386# define CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED (CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG || \
387 CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG)
388# define CONFIG_SOC_EFUSE_DIS_USB_JTAG SOC_EFUSE_DIS_USB_JTAG
389# define CONFIG_SOC_EFUSE_HARD_DIS_JTAG SOC_EFUSE_HARD_DIS_JTAG
390# define CONFIG_SOC_EFUSE_SOFT_DIS_JTAG SOC_EFUSE_SOFT_DIS_JTAG
391# define CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED 1
392# define CONFIG_USJ_ENABLE_USB_SERIAL_JTAG CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED
393#endif /* SOC_USB_SERIAL_JTAG_SUPPORTED */
394
395/* should be RIOT_APPLICATION but PROJECT_NAME must be less than 24 characters */
396#define PROJECT_NAME "RIOT-OS Application"
397
398#endif /* DOXYGEN */
399
400#ifdef __cplusplus
401extern "C" {
402#endif
403
404#ifdef __cplusplus
405}
406#endif
407
SDK configuration used by the ESP-IDF for ESP32 SoC variant (family)
SDK configuration used by the ESP-IDF for ESP32-C3 SoC variant (family)
SDK configuration used by the ESP-IDF for ESP32-C6 SoC variant (family)
SDK configuration used by the ESP-IDF for ESP32-H2 SoC variant (family)
SDK configuration used by the ESP-IDF for ESP32-S2 SoC variant (family)
SDK configuration used by the ESP-IDF for ESP32-S3 SoC variant (family)