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cpu_eth.h
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1/*
2 * SPDX-FileCopyrightText: 2016 Freie Universität Berlin
3 * SPDX-FileCopyrightText: 2017 OTA keys S.A.
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#include <stdint.h>
21
22#include "periph/cpu_gpio.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
31typedef enum {
32 MII = 18,
33 RMII = 9,
34 SMI = 2,
36
40typedef struct {
42 uint16_t speed;
43 uint8_t dma;
44 uint8_t dma_chan;
45 uint8_t phy_addr;
46 gpio_t pins[];
50
58typedef struct eth_dma_desc {
59 volatile uint32_t status;
60 volatile uint32_t control;
61 char * volatile buffer_addr;
62 struct eth_dma_desc * volatile desc_next;
63 volatile uint32_t reserved1_ext;
64 volatile uint32_t reserved2;
77 volatile uint32_t ts_low;
78 volatile uint32_t ts_high;
80
85#define RX_DESC_STAT_LS (BIT8)
86#define RX_DESC_STAT_FS (BIT9)
93#define RX_DESC_STAT_FL (0x3FFF0000) /* bits 16-29 */
94#define RX_DESC_STAT_DE (BIT14)
95#define RX_DESC_STAT_ES (BIT15)
96#define RX_DESC_STAT_OWN (BIT31)
109#define RX_DESC_CTRL_RCH (BIT14)
115#define TX_DESC_STAT_UF (BIT1)
116#define TX_DESC_STAT_EC (BIT8)
117#define TX_DESC_STAT_NC (BIT10)
118#define TX_DESC_STAT_ES (BIT15)
119#define TX_DESC_STAT_TTSS (BIT17)
127#define TX_DESC_STAT_TCH (BIT20)
128#define TX_DESC_STAT_TER (BIT21)
139#define TX_DESC_STAT_CIC (BIT22 | BIT23)
140#define TX_DESC_STAT_CIC_NO_HW_CHECKSUM (0)
141#define TX_DESC_STAT_CIC_HW_CHECKSUM_IPV4 (BIT22)
142#define TX_DESC_STAT_CIC_HW_CHECKSUM_BOTH (BIT22 | BIT32)
143
144#define TX_DESC_STAT_TTSE (BIT25)
145#define TX_DESC_STAT_FS (BIT28)
146#define TX_DESC_STAT_LS (BIT29)
147#define TX_DESC_STAT_IC (BIT30)
148#define TX_DESC_STAT_OWN (BIT31)
150
151#ifdef MODULE_PERIPH_ETH_COMMON
156void stm32_eth_common_init(void);
157#endif /* MODULE_PERIPH_ETH_COMMON */
158
159#ifdef __cplusplus
160}
161#endif
162
eth_mode_t
STM32 Ethernet configuration mode.
Definition cpu_eth.h:31
@ SMI
Configuration for SMI.
Definition cpu_eth.h:34
@ MII
Configuration for MII.
Definition cpu_eth.h:32
@ RMII
Configuration for RMII.
Definition cpu_eth.h:33
struct eth_dma_desc edma_desc_t
Layout of enhanced RX/TX DMA descriptor.
GPIO CPU definitions for the STM32 family.
Ethernet Peripheral configuration.
Definition cpu_eth.h:40
uint8_t dma_chan
DMA channel used for TX.
Definition cpu_eth.h:44
uint8_t dma
Locical CMA Descriptor used for TX.
Definition cpu_eth.h:43
gpio_t pins[]
Pins to use.
Definition cpu_eth.h:46
uint8_t phy_addr
PHY address.
Definition cpu_eth.h:45
eth_mode_t mode
Select configuration mode.
Definition cpu_eth.h:41
uint16_t speed
Speed selection.
Definition cpu_eth.h:42
Layout of enhanced RX/TX DMA descriptor.
Definition cpu_eth.h:58
volatile uint32_t reserved1_ext
RX: Extended status, TX: reserved.
Definition cpu_eth.h:63
volatile uint32_t ts_low
Sub-second part of PTP timestamp of transmitted / sent frame.
Definition cpu_eth.h:77
volatile uint32_t reserved2
Reserved for future use.
Definition cpu_eth.h:64
char *volatile buffer_addr
RX/TX buffer.
Definition cpu_eth.h:61
volatile uint32_t control
Control bits.
Definition cpu_eth.h:60
volatile uint32_t status
Mostly status bits, some control bits.
Definition cpu_eth.h:59
struct eth_dma_desc *volatile desc_next
Address of next DMA descriptor.
Definition cpu_eth.h:62
volatile uint32_t ts_high
Second part of PTP timestamp.
Definition cpu_eth.h:78