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cpu_eth.h
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1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2017 OTA keys S.A.
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
21#ifndef PERIPH_CPU_ETH_H
22#define PERIPH_CPU_ETH_H
23
24#include <stdint.h>
25
26#include "periph/cpu_gpio.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
35typedef enum {
36 MII = 18,
37 RMII = 9,
38 SMI = 2,
40
44typedef struct {
46 uint16_t speed;
47 uint8_t dma;
48 uint8_t dma_chan;
49 uint8_t phy_addr;
50 gpio_t pins[];
54
62typedef struct eth_dma_desc {
63 volatile uint32_t status;
64 volatile uint32_t control;
65 char * volatile buffer_addr;
66 struct eth_dma_desc * volatile desc_next;
67 volatile uint32_t reserved1_ext;
68 volatile uint32_t reserved2;
81 volatile uint32_t ts_low;
82 volatile uint32_t ts_high;
84
89#define RX_DESC_STAT_LS (BIT8)
90#define RX_DESC_STAT_FS (BIT9)
97#define RX_DESC_STAT_FL (0x3FFF0000) /* bits 16-29 */
98#define RX_DESC_STAT_DE (BIT14)
99#define RX_DESC_STAT_ES (BIT15)
100#define RX_DESC_STAT_OWN (BIT31)
113#define RX_DESC_CTRL_RCH (BIT14)
119#define TX_DESC_STAT_UF (BIT1)
120#define TX_DESC_STAT_EC (BIT8)
121#define TX_DESC_STAT_NC (BIT10)
122#define TX_DESC_STAT_ES (BIT15)
123#define TX_DESC_STAT_TTSS (BIT17)
131#define TX_DESC_STAT_TCH (BIT20)
132#define TX_DESC_STAT_TER (BIT21)
143#define TX_DESC_STAT_CIC (BIT22 | BIT23)
144#define TX_DESC_STAT_CIC_NO_HW_CHECKSUM (0)
145#define TX_DESC_STAT_CIC_HW_CHECKSUM_IPV4 (BIT22)
146#define TX_DESC_STAT_CIC_HW_CHECKSUM_BOTH (BIT22 | BIT32)
148#define TX_DESC_STAT_TTSE (BIT25)
149#define TX_DESC_STAT_FS (BIT28)
150#define TX_DESC_STAT_LS (BIT29)
151#define TX_DESC_STAT_IC (BIT30)
152#define TX_DESC_STAT_OWN (BIT31)
155#ifdef MODULE_PERIPH_ETH_COMMON
160void stm32_eth_common_init(void);
161#endif /* MODULE_PERIPH_ETH_COMMON */
162
163
164#ifdef __cplusplus
165}
166#endif
167
168#endif /* PERIPH_CPU_ETH_H */
eth_mode_t
STM32 Ethernet configuration mode.
Definition cpu_eth.h:35
@ SMI
Configuration for SMI.
Definition cpu_eth.h:38
@ MII
Configuration for MII.
Definition cpu_eth.h:36
@ RMII
Configuration for RMII.
Definition cpu_eth.h:37
struct eth_dma_desc edma_desc_t
Layout of enhanced RX/TX DMA descriptor.
GPIO CPU definitions for the STM32 family.
Ethernet Peripheral configuration.
Definition cpu_eth.h:44
uint8_t dma_chan
DMA channel used for TX.
Definition cpu_eth.h:48
uint8_t dma
Locical CMA Descriptor used for TX.
Definition cpu_eth.h:47
uint8_t phy_addr
PHY address.
Definition cpu_eth.h:49
eth_mode_t mode
Select configuration mode.
Definition cpu_eth.h:45
uint16_t speed
Speed selection.
Definition cpu_eth.h:46
Layout of enhanced RX/TX DMA descriptor.
Definition cpu_eth.h:62
volatile uint32_t reserved1_ext
RX: Extended status, TX: reserved.
Definition cpu_eth.h:67
volatile uint32_t ts_low
Sub-second part of PTP timestamp of transmitted / sent frame.
Definition cpu_eth.h:81
volatile uint32_t reserved2
Reserved for future use.
Definition cpu_eth.h:68
char *volatile buffer_addr
RX/TX buffer.
Definition cpu_eth.h:65
volatile uint32_t control
Control bits.
Definition cpu_eth.h:64
volatile uint32_t status
Mostly status bits, some control bits.
Definition cpu_eth.h:63
struct eth_dma_desc *volatile desc_next
Address of next DMA descriptor.
Definition cpu_eth.h:66
volatile uint32_t ts_high
Second part of PTP timestamp.
Definition cpu_eth.h:82