- Generated on Sat Sep 5 2026 10:33:18 by
1.13.2
Support for the xG23-PK6068A board. More...
Support for the xG23-PK6068A board.
The EFR32xG23 (xG23) Pro Kit is designed to support the development of Wireless IoT devices based on Sub-GHz wireless protocols. The Pro Kit includes a radio board that provides a complete reference design for the EFR32xG23 Wireless SoC, with the matching network for +20 dBm covering 868 to 915 MHz.
The main board contains an onboard J-Link debugger with a Packet Trace Interface and a Virtual COM port, enabling application development and debugging of the attached radio board as well as external hardware through an expansion header.
| MCU | EFR32ZG23 |
|---|---|
| Family | ARM Cortex-M33 |
| Series | Series 2 |
| Vendor | Silicon Labs |
| Vendor Family | EFM32 Wireless Gecko |
| RAM | 64.0 KiB |
| Flash | 512.0 KiB |
| EEPROM | no |
| Frequency | up to 78 MHz |
| FPU | yes |
| MPU | no |
| DMA | 8 channels |
| Timers | 4x 16-bits, 1x 32-bits |
| ADCs | 16-bit ADC |
| UARTs | 1x USART, 3x EUSART |
| SPIs | 1x USART |
| I2Cs | 2x |
| Vcc | 1.71 V - 3.8 V |
| Datasheet | EFR32ZG23 |
| Manual | EFR32xG23 |
| Board Manual | xG23 |
| Board Schematic | Main Board BRD4001A, EFR32ZG23 Module BRD4210A |
This is the pinout of the expansion header on the right side of the board. PIN 1 is the bottom-left contact when the header faces you horizontally.
| PIN | PIN | ||
|---|---|---|---|
| 3V3 | 20 | 19 | RES |
| 5V | 18 | 17 | RES |
| PC7 | 16 | 15 | PC5 |
| PA9 | 14 | 13 | PA7 |
| PA8 | 12 | 11 | PA6 |
| PC0 | 10 | 9 | PD2 |
| PC3 | 8 | 7 | PA5 |
| PC2 | 6 | 5 | PA0 |
| PC1 | 4 | 3 | PA10 |
| VMCU | 2 | 1 | GND |
| Peripheral | Number | Hardware | Pins | Comments | Min. Power Mode |
|---|---|---|---|---|---|
| I2C | 0 | I2C0 | SDA: PC7, CLK: PC5 | EM1 | |
| SPI | 0 | USART0 | MOSI: PC1, MISO: PC2, CLK: PC3 | PC4 used as CS for Serial Flash | EM1 |
| Timer | 0 | TIMER0 | Default ztimer backend | EM1 | |
| 1 | LETIMER0 | EM3 | |||
| UART | 0 | EUSART1 | RX: PA9, TX: PA8 | Default STDIO output | EM1 |
| ADC_LINE | 0 | IADC0 | IN+: PA10, IN-: GND | Single-ended, V_ref: 2 * 1.21V | EM1 |
| 1 | IADC0 | IN+: PA0, IN-:PA5 | Differential, V_ref: 2 * 1.21V | EM1 |
| Peripheral | Number | Mapped to | Pin | Comments |
|---|---|---|---|---|
| Button | 0 | PB0_PIN | PB1 | |
| 1 | PB1_PIN | PB3 | ||
| LED | 0 | LED0_PIN | PB2 | Yellow LED |
| 1 | LED1_PIN | PD3 | Yellow LED |
| Device | ID | Supported | Comments |
|---|---|---|---|
| MCU | EFR32ZG | yes | Power modes supported |
| Low-level driver | ADC | no | |
| Flash | yes | ||
| GPIO | yes | Interrupts are shared across pins (see reference manual) | |
| HW Crypto | partially | Only HW RNG | |
| I2C | yes | ||
| PWM | no | ||
| RTC | no | As RTT or RTC | |
| SPI | yes | Only master mode | |
| Timer | yes | ||
| UART | yes | ||
| LCD driver | LS013B7DH03 | yes | Sharp Low Power Memory LCD via the U8g2 package |
| Temperature + humidity sensor | Si7021 | yes | Silicon Labs Temperature + Humidity sensor |
There are several clock sources that are available for the different peripherals. You are advised to read AN0004.2 to get familiar with the different clocks.
| Source | Internal | Speed | Comments |
|---|---|---|---|
| HFXO | No | 39 MHz | |
| LFXO | No | 32.768 kHz |
It is important that the clock speeds are known to the code, for proper calculations of speeds and baud rates. If the HFXO or LFXO are different from the speeds above, ensure to pass HFXO_FREQ=freq_in_hz and LFXO_FREQ=freq_in_hz to your compiler defines.
This port makes use of EMLIB by Silicon Labs to abstract peripheral registers. While some overhead is to be expected, it ensures proper setup of devices, provides chip errata and simplifies development. The exact overhead depends on the application and peripheral usage, but the largest overhead is expected during peripheral setup. A lot of read/write/get/set methods are implemented as inline methods or macros (which have no overhead).
Another advantage of EMLIB are the included assertions. These assertions ensure that peripherals are used properly. To enable this, pass DEBUG_EFM to your compiler defines.
EMLIB is licensed by Silicon Labs under the zlib-style license, which permits distribution of source.
To flash, SEGGER JLink is required.
Flashing is supported by RIOT-OS using the command below:
To run the GDB debugger, use the command:
Or, to connect with your own debugger:
Files | |
| file | board.h |
| Board specific definitions for the xG23-PK6068A. | |
| file | gpio_params.h |
| Board specific configuration of direct mapped GPIOs. | |
| file | periph_conf.h |
| Configuration of CPU peripherals for xG23-PK6068A board. | |
1.13.2