CPU specific implementations for the NXP LPC1768 cpu. More...
CPU specific implementations for the NXP LPC1768 cpu.
Files | |
file | cpu_conf.h |
CPU specific configuration options. | |
file | periph_cpu.h |
CPU specific definitions for internal peripheral handling. | |
#define | CPU_DEFAULT_IRQ_PRIO (1U) |
ARM Cortex-M specific CPU configuration. | |
#define | CPU_IRQ_NUMOF (35U) |
#define | CPU_FLASH_BASE LPC_FLASH_BASE |
#define | CPU_HAS_BITBAND (1) |
#define | CPUID_LEN (16U) |
CPU ID configuration. | |
#define CPU_DEFAULT_IRQ_PRIO (1U) |
ARM Cortex-M specific CPU configuration.
Definition at line 36 of file cpu_conf.h.
#define CPU_FLASH_BASE LPC_FLASH_BASE |
Definition at line 38 of file cpu_conf.h.
#define CPU_HAS_BITBAND (1) |
Definition at line 39 of file cpu_conf.h.
#define CPU_IRQ_NUMOF (35U) |
Definition at line 37 of file cpu_conf.h.
#define CPUID_LEN (16U) |
CPU ID configuration.
Definition at line 46 of file cpu_conf.h.