Cortex-M Memory Protection Unit (MPU) Driver Header File. More...
Cortex-M Memory Protection Unit (MPU) Driver Header File.
Definition in file mpu.h.
#include <stdbool.h>
#include <stdint.h>
Go to the source code of this file.
Macros | |
#define | MPU_NUM_REGIONS ( (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos ) |
Number of MPU regions available (will vary depending on the Cortex-M version) | |
#define | MPU_SIZE_TO_BYTES(size) ( (uintptr_t)1 << ((size) + 1) ) |
convert a region size code to a size in bytes | |
Enumerations | |
enum | { AP_NO_NO = 0 , AP_RW_NO = 1 , AP_RW_RO = 2 , AP_RW_RW = 3 , AP_RO_NO = 5 , AP_RO_RO = 6 } |
Access Permission words. More... | |
enum | { MPU_SIZE_32B = 4 , MPU_SIZE_64B = 5 , MPU_SIZE_128B = 6 , MPU_SIZE_256B = 7 , MPU_SIZE_512B = 8 , MPU_SIZE_1K = 9 , MPU_SIZE_2K = 10 , MPU_SIZE_4K = 11 , MPU_SIZE_8K = 12 , MPU_SIZE_16K = 13 , MPU_SIZE_32K = 14 , MPU_SIZE_64K = 15 , MPU_SIZE_128K = 16 , MPU_SIZE_256K = 17 , MPU_SIZE_512K = 18 , MPU_SIZE_1M = 19 , MPU_SIZE_2M = 20 , MPU_SIZE_4M = 21 , MPU_SIZE_8M = 22 , MPU_SIZE_16M = 23 , MPU_SIZE_32M = 24 , MPU_SIZE_64M = 25 , MPU_SIZE_128M = 26 , MPU_SIZE_256M = 27 , MPU_SIZE_512M = 28 , MPU_SIZE_1G = 29 , MPU_SIZE_2G = 30 , MPU_SIZE_4G = 31 } |
MPU region sizes. More... | |
Functions | |
static uint32_t | MPU_ATTR (uint32_t xn, uint32_t ap, uint32_t tex, uint32_t c, uint32_t b, uint32_t s, uint32_t size) |
generate an MPU attribute word suitable for writing to the RASR register | |
int | mpu_disable (void) |
disable the MPU | |
int | mpu_enable (void) |
enable the MPU | |
bool | mpu_enabled (void) |
test if the MPU is enabled | |
int | mpu_configure (uint_fast8_t region, uintptr_t base, uint_fast32_t attr) |
configure the base address and attributes for an MPU region | |
#define MPU_NUM_REGIONS ( (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos ) |
#define MPU_SIZE_TO_BYTES | ( | size | ) | ( (uintptr_t)1 << ((size) + 1) ) |
anonymous enum |
Access Permission words.
anonymous enum |
MPU region sizes.
|
inlinestatic |
generate an MPU attribute word suitable for writing to the RASR register
[in] | xn | eXecute Never flag (forbids instruction fetches) |
[in] | ap | Access Permission word, e.g. AP_RO_RO |
[in] | tex | Type Extension Field |
[in] | c | Cacheable bit |
[in] | b | Bufferable bit |
[in] | s | Sub-Region Disable (SRD) field |
[in] | size | region size code, e.g. MPU_SIZE_32B |
int mpu_configure | ( | uint_fast8_t | region, |
uintptr_t | base, | ||
uint_fast32_t | attr | ||
) |
configure the base address and attributes for an MPU region
[in] | region | MPU region to configure (0 <= region < MPU_NUM_REGIONS) |
[in] | base | base address in RAM (aligned to the size specified within attr ) |
[in] | attr | attribute word generated by MPU_ATTR() |
int mpu_disable | ( | void | ) |
disable the MPU
int mpu_enable | ( | void | ) |
enable the MPU
bool mpu_enabled | ( | void | ) |
test if the MPU is enabled