29#ifndef QMI8658_PARAM_I2C
31# define QMI8658_PARAM_I2C I2C_DEV(0)
33#ifndef QMI8658_PARAM_ADDR
35# define QMI8658_PARAM_ADDR CONFIG_QMI8658_PARAM_I2C
37#ifndef QMI8658_PARAM_ACC_ODR
39# define QMI8658_PARAM_ACC_ODR QMI8658_DATA_RATE_1KHZ
41#ifndef QMI8658_PARAM_ACC_LOWPWR_ODR
43# define QMI8658_PARAM_ACC_LOWPWR_ODR QMI8658_ACC_LOWPWR_DATA_RATE_21HZ
45#ifndef QMI8658_PARAM_ACC_FS
47# define QMI8658_PARAM_ACC_FS QMI8658_ACC_FS_2G
49#ifndef QMI8658_PARAM_GYRO_ODR
51# define QMI8658_PARAM_GYRO_ODR QMI8658_DATA_RATE_1KHZ
53#ifndef QMI8658_PARAM_GYRO_FS
55# define QMI8658_PARAM_GYRO_FS QMI8658_GYRO_FS_256DPS
66#ifndef QMI8658_PARAM_TAP_PRIORITY
67# define QMI8658_PARAM_TAP_PRIORITY QMI8658_TAP_PRIO_ZXY
70#ifndef QMI8658_PARAM_TAP_PEAKWIN
71# define QMI8658_PARAM_TAP_PEAKWIN 20
74#ifndef QMI8658_PARAM_TAP_TAPWIN
75# define QMI8658_PARAM_TAP_TAPWIN 50
78#ifndef QMI8658_PARAM_TAP_DTAPWIN
79# define QMI8658_PARAM_TAP_DTAPWIN 250
82#ifndef QMI8658_PARAM_TAP_ALPHA
83# define QMI8658_PARAM_TAP_ALPHA 625
86#ifndef QMI8658_PARAM_TAP_GAMMA
87# define QMI8658_PARAM_TAP_GAMMA 2500
90#ifndef QMI8658_PARAM_TAP_PEAKMAGTHR
91# define QMI8658_PARAM_TAP_PEAKMAGTHR 800
94#ifndef QMI8658_PARAM_TAP_UDMTHR
95# define QMI8658_PARAM_TAP_UDMTHR 400
101# define QMI8658_PARAMS { .i2c = QMI8658_PARAM_I2C, \
102 .addr = QMI8658_PARAM_ADDR, \
103 .acc_odr = QMI8658_PARAM_ACC_ODR, \
104 .acc_lowpwr_odr = QMI8658_PARAM_ACC_LOWPWR_ODR, \
105 .gyro_odr = QMI8658_PARAM_GYRO_ODR, \
106 .acc_fs = QMI8658_PARAM_ACC_FS, \
107 .gyro_fs = QMI8658_PARAM_GYRO_FS, }
109#ifndef QMI8658_SAUL_INFO
111# define QMI8658_SAUL_INFO { .name = "qmi8658" }
#define QMI8658_SAUL_INFO
Information for the SAUL registry.
#define QMI8658_PARAMS
Configuration parameter set.
static const qmi8658_params_t qmi8658_params[]
Configuration struct.
static const saul_reg_info_t qmi8658_saul_info[]
Additional meta information to keep in the SAUL registry.
SAUL registry interface definition.
Device initialization parameters.
Additional data to collect for each entry.