periph_cpu.h

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/*
 * SPDX-FileCopyrightText: 2020 Inria
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#ifdef __cplusplus
extern "C" {
#endif
 
#ifndef DOXYGEN

#define STM32_BOOTLOADER_ADDR   (0x1FFF0000)

#define HAVE_ADC_RES_T
typedef enum {
    ADC_RES_6BIT  = (ADC_CFGR1_RES),    
    ADC_RES_8BIT  = (ADC_CFGR1_RES_1),  
    ADC_RES_10BIT = (ADC_CFGR1_RES_0),  
    ADC_RES_12BIT = (0x00),             
    ADC_RES_14BIT = (0xfe),     
    ADC_RES_16BIT = (0xff)      
} adc_res_t;

#define VBAT_ADC_RES        ADC_RES_12BIT
#define VBAT_ADC_MAX        4095
 
#endif /* ndef DOXYGEN */

#if defined(CPU_LINE_STM32G0B1xx) || defined(CPU_LINE_STM32G081xx) || \
    defined(CPU_LINE_STM32G071xx) || defined(CPU_LINE_STM32G0C1xx)
#define TIM6_DAC_LPTIM1_SHARED_IRQ
#endif
 
#ifdef __cplusplus
}
#endif