periph_cpu.h

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/*
 * SPDX-FileCopyrightText: 2019 Inria
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#ifdef __cplusplus
extern "C" {
#endif

#if defined(ADC3)
#define ADC_DEVS            (3U)
#elif defined(ADC2)
#define ADC_DEVS            (2U)
#elif defined(ADC1)
#define ADC_DEVS            (1U)
#else
#error "Can't determine the number of ADC devices"
#endif
 
#if defined(CPU_MODEL_STM32WB55RG)
#define ADC_T_ADCVREG_STUP_US (20)
#endif
 
#ifndef DOXYGEN

#define STM32_BOOTLOADER_ADDR   (0x1FFF0000)

#define HAVE_ADC_RES_T
typedef enum {
    ADC_RES_6BIT  = (ADC_CFGR_RES),     
    ADC_RES_8BIT  = (ADC_CFGR_RES_1),   
    ADC_RES_10BIT = (ADC_CFGR_RES_0),   
    ADC_RES_12BIT = (0x00),             
    ADC_RES_14BIT = (0xfe), 
    ADC_RES_16BIT = (0xff)  
} adc_res_t;

#define VBAT_ADC_RES        ADC_RES_12BIT
#define VBAT_ADC_MAX        4095
 
#endif /* ndef DOXYGEN */
 
#ifdef __cplusplus
}
#endif