Loading...
Searching...
No Matches
board.h
Go to the documentation of this file.
1/*
2 * SPDX-FileCopyrightText: 2018 Eistec AB
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include "cpu.h"
19#include "board_common.h"
20#include "periph_conf.h"
21
22#ifdef __cplusplus
23extern "C"
24{
25#endif
26
27/* PTB18 is configured for non-maskable interrupt at power on reset, but it is
28 * also connected to the LED that is used by the JLink OpenSDA application as a
29 * status indicator, which causes the KW41Z to become stuck in the NMI handler
30 * at power on because the debugger interface is pulling the pin low to enable
31 * the LED to show that it is connected. */
32/* Set the FOPT bit to disable NMI so that we can use it as a GPIO pin for the LED */
33#define KINETIS_FOPT (0xff & ~(NV_FOPT_NMI_DIS_MASK))
38/* The LED pins on this board are connected to both the KW41Z and to the OpenSDA
39 * K22F MCU, which may cause some issues between the two MCUs. The safest way to
40 * use these LEDs is to cut the intentional shorts SH5, SH6 between the K22F and
41 * the KW41Z. Cutting these traces will leave the KW41Z connected to the LEDs
42 * but the K22F will be cut off. */
43/* The connected pin on the K22F (PTC6) is configured as an input when running
44 * the JLink OpenSDA application, so it should be reasonably safe to use this
45 * LED from the KW41Z */
46#define LED0_PIN GPIO_PIN(PORT_B, 3)
47#define LED0_MASK (1 << 3)
48#define LED0_ON (GPIOB->PCOR = LED0_MASK)
49#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
50#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
51/* Enable this only if you have cut the intentional short SH6 which connects
52 * the debugger pin to the LED and KW41Z PTB18. Otherwise we may end up with one
53 * MCU driving the pin high and the other driving it low */
54#if 0 /* user has cut SH6 */
55/* The connected pin on the K22F (PTC7) is configured as a digital output with
56 * high drive strength enabled in the JLink OpenSDA application, so this should
57 * definitely not be configured as a digital output on the KW41Z unless the
58 * corresponding short SH6 has been cut.*/
59#define LED1_PIN GPIO_PIN(PORT_B, 18)
60#define LED1_MASK (1 << 18)
61#define LED1_ON (GPIOB->PCOR = LED1_MASK)
62#define LED1_OFF (GPIOB->PSOR = LED1_MASK)
63#define LED1_TOGGLE (GPIOB->PTOR = LED1_MASK)
64#endif /* user has cut SH6 */
66
71/* Pressing SW1 will short this pin to ground but there are no external pull
72 * resistors, use internal pull-up on the pin */
73/* BTN0 is mapped to SW1 */
74#define BTN0_PIN GPIO_PIN(PORT_B, 2)
75#define BTN0_MODE GPIO_IN_PU
77
82#if IS_ACTIVE(KINETIS_XTIMER_SOURCE_PIT)
83/* PIT xtimer configuration */
84#define XTIMER_DEV (TIMER_PIT_DEV(0))
85#define XTIMER_CHAN (0)
86/* Default xtimer settings should work on the PIT */
87#else
88/* LPTMR xtimer configuration */
89#define XTIMER_DEV (TIMER_LPTMR_DEV(0))
90#define XTIMER_CHAN (0)
91/* LPTMR is 16 bits wide and runs at 32768 Hz (clocked by the RTC) */
92#define XTIMER_WIDTH (16)
93#define XTIMER_BACKOFF (5)
94#define XTIMER_ISR_BACKOFF (5)
95#define XTIMER_HZ (32768ul)
96#endif
98
103#define CONFIG_ZTIMER_USEC_TYPE ZTIMER_TYPE_PERIPH_TIMER
104#define CONFIG_ZTIMER_USEC_DEV (TIMER_PIT_DEV(0))
105#define CONFIG_ZTIMER_USEC_FREQ (1000000LU)
106#define CONFIG_ZTIMER_USEC_WIDTH (32)
108
109#ifdef __cplusplus
110}
111#endif
112