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periph_conf.h
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1/*
2 * Copyright (C) 2021 Gerson Fernando Budke
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
18#include "mutex.h"
19
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include <stdint.h>
28#include <avr/io.h>
29
30#include "periph_cpu.h"
31
36static const timer_conf_t timer_config[] = {
37 {
38 .dev = (void *)&TCC1,
39 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TC1_bm),
40 .type = TC_TYPE_1,
41 .int_lvl = { CPU_INT_LVL_LOW,
45 },
46 {
47 .dev = (void *)&TCC0,
48 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TC0_bm),
49 .type = TC_TYPE_0,
50 .int_lvl = { CPU_INT_LVL_LOW,
54 }
55};
56
57#define TIMER_0_ISRA TCC1_CCA_vect
58
59#define TIMER_1_ISRA TCC0_CCA_vect
60#define TIMER_1_ISRB TCC0_CCB_vect
61#define TIMER_1_ISRC TCC0_CCC_vect
62#define TIMER_1_ISRD TCC0_CCD_vect
63
64#define TIMER_NUMOF ARRAY_SIZE(timer_config)
71static const uart_conf_t uart_config[] = {
72 { /* J1 */
73 .dev = &USARTC0,
74 .pwr = PWR_RED_REG(PWR_PORT_C, PR_USART0_bm),
75 .rx_pin = GPIO_PIN(PORT_C, 2),
76 .tx_pin = GPIO_PIN(PORT_C, 3),
77#ifdef MODULE_PERIPH_UART_HW_FC
78 .rts_pin = GPIO_UNDEF,
79 .cts_pin = GPIO_UNDEF,
80#endif
81 .rx_int_lvl = CPU_INT_LVL_LOW,
82 .tx_int_lvl = CPU_INT_LVL_LOW,
83 .dre_int_lvl = CPU_INT_LVL_OFF,
84 },
85 { /* J4 */
86 .dev = &USARTE0,
87 .pwr = PWR_RED_REG(PWR_PORT_E, PR_USART0_bm),
88 .rx_pin = GPIO_PIN(PORT_E, 2),
89 .tx_pin = GPIO_PIN(PORT_E, 3),
90#ifdef MODULE_PERIPH_UART_HW_FC
91 .rts_pin = GPIO_UNDEF,
92 .cts_pin = GPIO_UNDEF,
93#endif
94 .rx_int_lvl = CPU_INT_LVL_LOW,
95 .tx_int_lvl = CPU_INT_LVL_LOW,
96 .dre_int_lvl = CPU_INT_LVL_OFF,
97 },
98};
99
100/* interrupt function name mapping */
101#define UART_0_RXC_ISR USARTC0_RXC_vect /* Reception Complete Interrupt */
102#define UART_0_DRE_ISR USARTC0_DRE_vect /* Data Register Empty Interrupt */
103#define UART_0_TXC_ISR USARTC0_TXC_vect /* Transmission Complete Interrupt */
104
105#define UART_1_RXC_ISR USARTE0_RXC_vect
106#define UART_1_DRE_ISR USARTE0_DRE_vect
107#define UART_1_TXC_ISR USARTE0_TXC_vect
108
109#define UART_NUMOF ARRAY_SIZE(uart_config)
116static const i2c_conf_t i2c_config[] = {
117 { /* J1 */
118 .dev = &TWIC,
119 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TWI_bm),
120 .sda_pin = GPIO_PIN(PORT_C, 0),
121 .scl_pin = GPIO_PIN(PORT_C, 1),
122 .speed = I2C_SPEED_NORMAL,
123 .int_lvl = CPU_INT_LVL_LOW,
124 },
125};
126
127#define I2C_0_ISR TWIC_TWIM_vect
128
129#define I2C_NUMOF ARRAY_SIZE(i2c_config)
136static const spi_conf_t spi_config[] = {
137 {
138 .dev = &SPIC,
139 .pwr = PWR_RED_REG(PWR_PORT_C, PR_SPI_bm),
140 .sck_pin = GPIO_PIN(PORT_C, 7),
141 .miso_pin = GPIO_PIN(PORT_C, 6),
142 .mosi_pin = GPIO_PIN(PORT_C, 5),
143 .ss_pin = GPIO_PIN(PORT_C, 4),
144 },
145};
146
147#define SPI_NUMOF ARRAY_SIZE(spi_config)
150#ifdef __cplusplus
151}
152#endif
153
154#include "periph_conf_common.h"
155
156#endif /* PERIPH_CONF_H */
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_E
port E
Definition periph_cpu.h:51
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
#define PWR_RED_REG(reg, dev)
Define a CPU specific Power Reduction index macro.
Definition periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ CPU_INT_LVL_OFF
Interrupt Disabled
Definition periph_cpu.h:40
@ CPU_INT_LVL_LOW
Interrupt Low Level
Definition periph_cpu.h:41
Mutex for thread synchronization.
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Definition periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:265
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219