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cpu_qdec.h
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1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2017 OTA keys S.A.
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
21#ifndef PERIPH_CPU_QDEC_H
22#define PERIPH_CPU_QDEC_H
23
24#include <stdint.h>
25
26#include "cpu.h"
27#include "periph/cpu_gpio.h"
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
36#define QDEC_CHAN (2U)
37
41typedef struct {
42 gpio_t pin;
43 uint8_t cc_chan;
45
49typedef struct {
50 TIM_TypeDef *dev;
51 uint32_t max;
52 uint32_t rcc_mask;
55#ifdef CPU_FAM_STM32F1
56 uint32_t remap;
58#else
60#endif
61 uint8_t bus;
62 uint8_t irqn;
64
65#ifdef __cplusplus
66}
67#endif
68
69#endif /* PERIPH_CPU_QDEC_H */
GPIO CPU definitions for the STM32 family.
#define QDEC_CHAN
All STM QDEC timers have 2 capture channels.
Definition cpu_qdec.h:36
gpio_af_t
Override alternative GPIO mode options.
Definition periph_cpu.h:166
QDEC channel.
Definition cpu_qdec.h:41
uint8_t cc_chan
capture compare channel used
Definition cpu_qdec.h:43
gpio_t pin
GPIO pin mapped to this channel.
Definition cpu_qdec.h:42
Quadrature decoder configuration struct.
uint32_t max
Maximum counter value.
Definition cpu_qdec.h:51
uint8_t irqn
global IRQ channel
Definition cpu_qdec.h:62
gpio_af_t af
alternate function used
Definition cpu_qdec.h:59
uint32_t rcc_mask
bit in clock enable register
Definition cpu_qdec.h:52
TIM_TypeDef * dev
Timer used.
Definition cpu_qdec.h:50
uint8_t bus
APB bus.
Definition cpu_qdec.h:61