adxl345__regs_8h_source.html

/*

 * SPDX-FileCopyrightText: 2017 Mesotic SAS

 * SPDX-License-Identifier: LGPL-2.1-only

 */


#pragma once


#ifdef __cplusplus

 extern "C" {

#endif


#define ADXL345_CHIP_ID_REG    (0x00)

#define ADXL345_THRESH_TAP     (0x1D)

#define ADXL345_OFFSET_X       (0x1E)

#define ADXL345_OFFSET_Y       (0x1F)

#define ADXL345_OFFSET_Z       (0x20)

#define ADXL345_TAP_DUR        (0x21)

#define ADXL345_TAP_LAT        (0x22)

#define ADXL345_TAP_WIN        (0x23)

#define ADXL345_THRESH_ACT     (0x24)

#define ADXL345_THRESH_INACT   (0x25)

#define ADXL345_TIME_INACT     (0x26)

#define ADXL345_ACT_INACT_CTL  (0x27)

#define ADXL345_THRESH_FF      (0x28)

#define ADXL345_TIME_FF        (0x29)

#define ADXL345_TAP_AXES       (0x2A)

#define ADXL345_ACT_TAP_STATUS (0x2B)

#define ADXL345_BW_RATE        (0x2C)

#define ADXL345_POWER_CTL      (0x2D)

#define ADXL345_INT_ENABLE     (0x2E)

#define ADXL345_INT_MAP        (0x2F)

#define ADXL345_INT_SOURCE     (0x30)

#define ADXL345_DATA_FORMAT    (0x31)

#define ADXL345_DATA_X0        (0x32)

#define ADXL345_DATA_X1        (0x33)

#define ADXL345_DATA_Y0        (0x34)

#define ADXL345_DATA_Y1        (0x35)

#define ADXL345_DATA_Z0        (0x36)

#define ADXL345_DATA_Z1        (0x37)

#define ADXL345_FIFO_CTL       (0x38)

#define ADXL345_FIFO_STATUS    (0x39)


#define ADXL345_CHIP_ID        (0xE5)


#define ADXL345_RES_10_BITS       (0x03FF)

#define ADXL345_RES_11_BITS       (0x07FF)

#define ADXL345_RES_12_BITS       (0x0FFF)

#define ADXL345_RES_13_BITS       (0x1FFF)


#define ADXL345_INACT_Z_ENABLE    (1 << 0)

#define ADXL345_INACT_Y_ENABLE    (1 << 1)

#define ADXL345_INACT_X_ENABLE    (1 << 2)

#define ADXL345_INACT_ACDC        (1 << 3)

#define ADXL345_ACT_Z_ENABLE      (1 << 4)

#define ADXL345_ACT_Y_ENABLE      (1 << 5)

#define ADXL345_ACT_X_ENABLE      (1 << 6)

#define ADXL345_ACT_ACDC          (1 << 7)


#define ADXL345_TAP_Z_ENABLE      (1 << 0)

#define ADXL345_TAP_Y_ENABLE      (1 << 1)

#define ADXL345_TAP_X_ENABLE      (1 << 2)

#define ADXL345_SUPPRESS          (1 << 3)

#define ADXL345_TAP_ALL_ENABLE    (ADXL345_TAP_Z_ENABLE | \

                                   ADXL345_TAP_Y_ENABLE | \

                                   ADXL345_TAP_X_ENABLE)


#define ADXL345_TAP_Z_SRC         (1 << 0)

#define ADXL345_TAP_Y_SRC         (1 << 1)

#define ADXL345_TAP_X_SRC         (1 << 2)

#define ADXL345_ASLEEP            (1 << 3)

#define ADXL345_ACT_Z_SRC         (1 << 4)

#define ADXL345_ACT_Y_SRC         (1 << 5)

#define ADXL345_ACT_X_SRC         (1 << 6)


#define ADXL345_RATE_MASK         (0x0F)

#define ADXL345_LOWPOWER          (1 << 4)


#define ADXL345_WAKEUP_8HZ        (0x00)

#define ADXL345_WAKEUP_4HZ        (0x01)

#define ADXL345_WAKEUP_2HZ        (0x02)

#define ADXL345_WAKEUP_1HZ        (0x03)

#define ADXL345_SLEEP_BIT         (1 << 2)

#define ADXL345_MEASURE_BIT       (1 << 3)

#define ADXL345_AUTOSLEEP_BIT     (1 << 4)

#define ADXL345_LINK_BIT          (1 << 5)


#define ADXL345_OVERRUN          (1 << 0)

#define ADXL345_WATERMARK        (1 << 1)

#define ADXL345_FREEFALL         (1 << 2)

#define ADXL345_INACTIVITY       (1 << 3)

#define ADXL345_ACTIVITY         (1 << 4)

#define ADXL345_DOUBLE_TAP       (1 << 5)

#define ADXL345_SINGLE_TAP       (1 << 6)

#define ADXL345_DATA_READY       (1 << 7)


#define ADXL345_RANGE_MASK        (0x03)

#define ADXL345_JUSTIFY           (1 << 2)

#define ADXL345_FULL_RES          (1 << 3)

#define ADXL345_INT_INVERT        (1 << 5)

#define ADXL345_SPI_BIT           (1 << 6)

#define ADXL345_SELF_TEST         (1 << 7)


#define ADXL345_SAMPLES_MASK      (0x0F)

#define ADXL345_FIFO_TRIGGER_POS  (4)

#define ADXL345_FIFO_TRIGGER      (1 << ADXL345_FIFO_TRIGGER_POS)

#define ADXL345_FIFO_MODE_POS     (6)

#define ADXL345_FIFO_MODE_MASK    (0xC0)


#define ADXL345_FIFO_ENTRIES_MASK (0x3F)

#define ADXL345_FIFO_TRIG         (1 << 7)


#ifdef __cplusplus

}

#endif