Register and bit definitions for the ADXL345. More...
Register and bit definitions for the ADXL345.
Definition in file adxl345_regs.h.
Go to the source code of this file.
Register addresses | |
#define | ADXL345_CHIP_ID_REG (0x00) |
Device ID. | |
#define | ADXL345_THRESH_TAP (0x1D) |
Tap threshold. | |
#define | ADXL345_OFFSET_X (0x1E) |
X-axis offset. | |
#define | ADXL345_OFFSET_Y (0x1F) |
Y-axis offset. | |
#define | ADXL345_OFFSET_Z (0x20) |
Z-axis offset. | |
#define | ADXL345_TAP_DUR (0x21) |
Tap duration. | |
#define | ADXL345_TAP_LAT (0x22) |
Tap latency. | |
#define | ADXL345_TAP_WIN (0x23) |
Tap window. | |
#define | ADXL345_THRESH_ACT (0x24) |
Activity threshold. | |
#define | ADXL345_THRESH_INACT (0x25) |
Inactivity threshold. | |
#define | ADXL345_TIME_INACT (0x26) |
Inactivity time. | |
#define | ADXL345_ACT_INACT_CTL (0x27) |
Axis enable control for activity and inactivity detection. | |
#define | ADXL345_THRESH_FF (0x28) |
Free-fall threshold. | |
#define | ADXL345_TIME_FF (0x29) |
Free-fall time. | |
#define | ADXL345_TAP_AXES (0x2A) |
Axis control for single tap/double tap. | |
#define | ADXL345_ACT_TAP_STATUS (0x2B) |
Source of single tap/double tap. | |
#define | ADXL345_BW_RATE (0x2C) |
Data rate and power mode control. | |
#define | ADXL345_POWER_CTL (0x2D) |
Power-saving features control. | |
#define | ADXL345_INT_ENABLE (0x2E) |
Interrupt enable control. | |
#define | ADXL345_INT_MAP (0x2F) |
Interrupt mapping control. | |
#define | ADXL345_INT_SOURCE (0x30) |
Source of interrupts. | |
#define | ADXL345_DATA_FORMAT (0x31) |
Data format control. | |
#define | ADXL345_DATA_X0 (0x32) |
X-Axis Data 0. | |
#define | ADXL345_DATA_X1 (0x33) |
X-Axis Data 1. | |
#define | ADXL345_DATA_Y0 (0x34) |
Y-Axis Data 0. | |
#define | ADXL345_DATA_Y1 (0x35) |
Y-Axis Data 1. | |
#define | ADXL345_DATA_Z0 (0x36) |
Z-Axis Data 0. | |
#define | ADXL345_DATA_Z1 (0x37) |
Z-Axis Data 1. | |
#define | ADXL345_FIFO_CTL (0x38) |
FIFO control. | |
#define | ADXL345_FIFO_STATUS (0x39) |
FIFO status. | |
Device ID for ADXL345 | |
#define | ADXL345_CHIP_ID (0xE5) |
Resolution masks for output data | |
#define | ADXL345_RES_10_BITS (0x03FF) |
#define | ADXL345_RES_11_BITS (0x07FF) |
#define | ADXL345_RES_12_BITS (0x0FFF) |
#define | ADXL345_RES_13_BITS (0x1FFF) |
bits definitions for ACT_INACT_CTL register | |
#define | ADXL345_INACT_Z_ENABLE (1 << 0) |
#define | ADXL345_INACT_Y_ENABLE (1 << 1) |
#define | ADXL345_INACT_X_ENABLE (1 << 2) |
#define | ADXL345_INACT_ACDC (1 << 3) |
#define | ADXL345_ACT_Z_ENABLE (1 << 4) |
#define | ADXL345_ACT_Y_ENABLE (1 << 5) |
#define | ADXL345_ACT_X_ENABLE (1 << 6) |
#define | ADXL345_ACT_ACDC (1 << 7) |
bits definitions for TAP_AXES register | |
#define | ADXL345_TAP_Z_ENABLE (1 << 0) |
#define | ADXL345_TAP_Y_ENABLE (1 << 1) |
#define | ADXL345_TAP_X_ENABLE (1 << 2) |
#define | ADXL345_SUPPRESS (1 << 3) |
#define | ADXL345_TAP_ALL_ENABLE |
bits definitions for ACT_TAP_STATUS register | |
#define | ADXL345_TAP_Z_SRC (1 << 0) |
#define | ADXL345_TAP_Y_SRC (1 << 1) |
#define | ADXL345_TAP_X_SRC (1 << 2) |
#define | ADXL345_ASLEEP (1 << 3) |
#define | ADXL345_ACT_Z_SRC (1 << 4) |
#define | ADXL345_ACT_Y_SRC (1 << 5) |
#define | ADXL345_ACT_X_SRC (1 << 6) |
bits definitions for BW_RATE register | |
#define | ADXL345_RATE_MASK (0x0F) |
#define | ADXL345_LOWPOWER (1 << 4) |
bits definitions for PWR_CTL register | |
#define | ADXL345_WAKEUP_8HZ (0x00) |
#define | ADXL345_WAKEUP_4HZ (0x01) |
#define | ADXL345_WAKEUP_2HZ (0x02) |
#define | ADXL345_WAKEUP_1HZ (0x03) |
#define | ADXL345_SLEEP_BIT (1 << 2) |
#define | ADXL345_MEASURE_BIT (1 << 3) |
#define | ADXL345_AUTOSLEEP_BIT (1 << 4) |
#define | ADXL345_LINK_BIT (1 << 5) |
interrupts pins definitions for INT_ENABLE, INT_MAP and INT_SOURCE | |
registers | |
#define | ADXL345_OVERRUN (1 << 0) |
#define | ADXL345_WATERMARK (1 << 1) |
#define | ADXL345_FREEFALL (1 << 2) |
#define | ADXL345_INACTIVITY (1 << 3) |
#define | ADXL345_ACTIVITY (1 << 4) |
#define | ADXL345_DOUBLE_TAP (1 << 5) |
#define | ADXL345_SINGLE_TAP (1 << 6) |
#define | ADXL345_DATA_READY (1 << 7) |
bits definitions for DATA_FORMAT register | |
#define | ADXL345_RANGE_MASK (0x03) |
#define | ADXL345_JUSTIFY (1 << 2) |
#define | ADXL345_FULL_RES (1 << 3) |
#define | ADXL345_INT_INVERT (1 << 5) |
#define | ADXL345_SPI_BIT (1 << 6) |
#define | ADXL345_SELF_TEST (1 << 7) |
bits definitions for FIFO_CTL register | |
#define | ADXL345_SAMPLES_MASK (0x0F) |
#define | ADXL345_FIFO_TRIGGER_POS (4) |
#define | ADXL345_FIFO_TRIGGER (1 << ADXL345_FIFO_TRIGGER_POS) |
#define | ADXL345_FIFO_MODE_POS (6) |
#define | ADXL345_FIFO_MODE_MASK (0xC0) |
bits definitions for FIFO_STATUS register | |
#define | ADXL345_FIFO_ENTRIES_MASK (0x3F) |
#define | ADXL345_FIFO_TRIG (1 << 7) |
#define ADXL345_ACT_ACDC (1 << 7) |
Definition at line 90 of file adxl345_regs.h.
#define ADXL345_ACT_INACT_CTL (0x27) |
Axis enable control for activity and inactivity detection.
Definition at line 41 of file adxl345_regs.h.
#define ADXL345_ACT_TAP_STATUS (0x2B) |
Source of single tap/double tap.
Definition at line 45 of file adxl345_regs.h.
#define ADXL345_ACT_X_ENABLE (1 << 6) |
Definition at line 89 of file adxl345_regs.h.
#define ADXL345_ACT_X_SRC (1 << 6) |
Definition at line 116 of file adxl345_regs.h.
#define ADXL345_ACT_Y_ENABLE (1 << 5) |
Definition at line 88 of file adxl345_regs.h.
#define ADXL345_ACT_Y_SRC (1 << 5) |
Definition at line 115 of file adxl345_regs.h.
#define ADXL345_ACT_Z_ENABLE (1 << 4) |
Definition at line 87 of file adxl345_regs.h.
#define ADXL345_ACT_Z_SRC (1 << 4) |
Definition at line 114 of file adxl345_regs.h.
#define ADXL345_ACTIVITY (1 << 4) |
Definition at line 150 of file adxl345_regs.h.
#define ADXL345_ASLEEP (1 << 3) |
Definition at line 113 of file adxl345_regs.h.
#define ADXL345_AUTOSLEEP_BIT (1 << 4) |
Definition at line 137 of file adxl345_regs.h.
#define ADXL345_BW_RATE (0x2C) |
Data rate and power mode control.
Definition at line 46 of file adxl345_regs.h.
#define ADXL345_CHIP_ID (0xE5) |
Definition at line 66 of file adxl345_regs.h.
#define ADXL345_CHIP_ID_REG (0x00) |
Device ID.
Definition at line 30 of file adxl345_regs.h.
#define ADXL345_DATA_FORMAT (0x31) |
Data format control.
Definition at line 51 of file adxl345_regs.h.
#define ADXL345_DATA_READY (1 << 7) |
Definition at line 153 of file adxl345_regs.h.
#define ADXL345_DATA_X0 (0x32) |
X-Axis Data 0.
Definition at line 52 of file adxl345_regs.h.
#define ADXL345_DATA_X1 (0x33) |
X-Axis Data 1.
Definition at line 53 of file adxl345_regs.h.
#define ADXL345_DATA_Y0 (0x34) |
Y-Axis Data 0.
Definition at line 54 of file adxl345_regs.h.
#define ADXL345_DATA_Y1 (0x35) |
Y-Axis Data 1.
Definition at line 55 of file adxl345_regs.h.
#define ADXL345_DATA_Z0 (0x36) |
Z-Axis Data 0.
Definition at line 56 of file adxl345_regs.h.
#define ADXL345_DATA_Z1 (0x37) |
Z-Axis Data 1.
Definition at line 57 of file adxl345_regs.h.
#define ADXL345_DOUBLE_TAP (1 << 5) |
Definition at line 151 of file adxl345_regs.h.
#define ADXL345_FIFO_CTL (0x38) |
FIFO control.
Definition at line 58 of file adxl345_regs.h.
#define ADXL345_FIFO_ENTRIES_MASK (0x3F) |
Definition at line 183 of file adxl345_regs.h.
#define ADXL345_FIFO_MODE_MASK (0xC0) |
Definition at line 176 of file adxl345_regs.h.
#define ADXL345_FIFO_MODE_POS (6) |
Definition at line 175 of file adxl345_regs.h.
#define ADXL345_FIFO_STATUS (0x39) |
FIFO status.
Definition at line 59 of file adxl345_regs.h.
#define ADXL345_FIFO_TRIG (1 << 7) |
Definition at line 184 of file adxl345_regs.h.
#define ADXL345_FIFO_TRIGGER (1 << ADXL345_FIFO_TRIGGER_POS) |
Definition at line 174 of file adxl345_regs.h.
#define ADXL345_FIFO_TRIGGER_POS (4) |
Definition at line 173 of file adxl345_regs.h.
#define ADXL345_FREEFALL (1 << 2) |
Definition at line 148 of file adxl345_regs.h.
#define ADXL345_FULL_RES (1 << 3) |
Definition at line 162 of file adxl345_regs.h.
#define ADXL345_INACT_ACDC (1 << 3) |
Definition at line 86 of file adxl345_regs.h.
#define ADXL345_INACT_X_ENABLE (1 << 2) |
Definition at line 85 of file adxl345_regs.h.
#define ADXL345_INACT_Y_ENABLE (1 << 1) |
Definition at line 84 of file adxl345_regs.h.
#define ADXL345_INACT_Z_ENABLE (1 << 0) |
Definition at line 83 of file adxl345_regs.h.
#define ADXL345_INACTIVITY (1 << 3) |
Definition at line 149 of file adxl345_regs.h.
#define ADXL345_INT_ENABLE (0x2E) |
Interrupt enable control.
Definition at line 48 of file adxl345_regs.h.
#define ADXL345_INT_INVERT (1 << 5) |
Definition at line 163 of file adxl345_regs.h.
#define ADXL345_INT_MAP (0x2F) |
Interrupt mapping control.
Definition at line 49 of file adxl345_regs.h.
#define ADXL345_INT_SOURCE (0x30) |
Source of interrupts.
Definition at line 50 of file adxl345_regs.h.
#define ADXL345_JUSTIFY (1 << 2) |
Definition at line 161 of file adxl345_regs.h.
#define ADXL345_LINK_BIT (1 << 5) |
Definition at line 138 of file adxl345_regs.h.
#define ADXL345_LOWPOWER (1 << 4) |
Definition at line 124 of file adxl345_regs.h.
#define ADXL345_MEASURE_BIT (1 << 3) |
Definition at line 136 of file adxl345_regs.h.
#define ADXL345_OFFSET_X (0x1E) |
X-axis offset.
Definition at line 32 of file adxl345_regs.h.
#define ADXL345_OFFSET_Y (0x1F) |
Y-axis offset.
Definition at line 33 of file adxl345_regs.h.
#define ADXL345_OFFSET_Z (0x20) |
Z-axis offset.
Definition at line 34 of file adxl345_regs.h.
#define ADXL345_OVERRUN (1 << 0) |
Definition at line 146 of file adxl345_regs.h.
#define ADXL345_POWER_CTL (0x2D) |
Power-saving features control.
Definition at line 47 of file adxl345_regs.h.
#define ADXL345_RANGE_MASK (0x03) |
Definition at line 160 of file adxl345_regs.h.
#define ADXL345_RATE_MASK (0x0F) |
Definition at line 123 of file adxl345_regs.h.
#define ADXL345_RES_10_BITS (0x03FF) |
Definition at line 73 of file adxl345_regs.h.
#define ADXL345_RES_11_BITS (0x07FF) |
Definition at line 74 of file adxl345_regs.h.
#define ADXL345_RES_12_BITS (0x0FFF) |
Definition at line 75 of file adxl345_regs.h.
#define ADXL345_RES_13_BITS (0x1FFF) |
Definition at line 76 of file adxl345_regs.h.
#define ADXL345_SAMPLES_MASK (0x0F) |
Definition at line 172 of file adxl345_regs.h.
#define ADXL345_SELF_TEST (1 << 7) |
Definition at line 165 of file adxl345_regs.h.
#define ADXL345_SINGLE_TAP (1 << 6) |
Definition at line 152 of file adxl345_regs.h.
#define ADXL345_SLEEP_BIT (1 << 2) |
Definition at line 135 of file adxl345_regs.h.
#define ADXL345_SPI_BIT (1 << 6) |
Definition at line 164 of file adxl345_regs.h.
#define ADXL345_SUPPRESS (1 << 3) |
Definition at line 100 of file adxl345_regs.h.
#define ADXL345_TAP_ALL_ENABLE |
Definition at line 101 of file adxl345_regs.h.
#define ADXL345_TAP_AXES (0x2A) |
Axis control for single tap/double tap.
Definition at line 44 of file adxl345_regs.h.
#define ADXL345_TAP_DUR (0x21) |
Tap duration.
Definition at line 35 of file adxl345_regs.h.
#define ADXL345_TAP_LAT (0x22) |
Tap latency.
Definition at line 36 of file adxl345_regs.h.
#define ADXL345_TAP_WIN (0x23) |
Tap window.
Definition at line 37 of file adxl345_regs.h.
#define ADXL345_TAP_X_ENABLE (1 << 2) |
Definition at line 99 of file adxl345_regs.h.
#define ADXL345_TAP_X_SRC (1 << 2) |
Definition at line 112 of file adxl345_regs.h.
#define ADXL345_TAP_Y_ENABLE (1 << 1) |
Definition at line 98 of file adxl345_regs.h.
#define ADXL345_TAP_Y_SRC (1 << 1) |
Definition at line 111 of file adxl345_regs.h.
#define ADXL345_TAP_Z_ENABLE (1 << 0) |
Definition at line 97 of file adxl345_regs.h.
#define ADXL345_TAP_Z_SRC (1 << 0) |
Definition at line 110 of file adxl345_regs.h.
#define ADXL345_THRESH_ACT (0x24) |
Activity threshold.
Definition at line 38 of file adxl345_regs.h.
#define ADXL345_THRESH_FF (0x28) |
Free-fall threshold.
Definition at line 42 of file adxl345_regs.h.
#define ADXL345_THRESH_INACT (0x25) |
Inactivity threshold.
Definition at line 39 of file adxl345_regs.h.
#define ADXL345_THRESH_TAP (0x1D) |
Tap threshold.
Definition at line 31 of file adxl345_regs.h.
#define ADXL345_TIME_FF (0x29) |
Free-fall time.
Definition at line 43 of file adxl345_regs.h.
#define ADXL345_TIME_INACT (0x26) |
Inactivity time.
Definition at line 40 of file adxl345_regs.h.
#define ADXL345_WAKEUP_1HZ (0x03) |
Definition at line 134 of file adxl345_regs.h.
#define ADXL345_WAKEUP_2HZ (0x02) |
Definition at line 133 of file adxl345_regs.h.
#define ADXL345_WAKEUP_4HZ (0x01) |
Definition at line 132 of file adxl345_regs.h.
#define ADXL345_WAKEUP_8HZ (0x00) |
Definition at line 131 of file adxl345_regs.h.
#define ADXL345_WATERMARK (1 << 1) |
Definition at line 147 of file adxl345_regs.h.