CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author: René Herthel rene-.nosp@m.hert.nosp@m.hel@o.nosp@m.utlo.nosp@m.ok.de; Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de; Francisco Acosta franc.nosp@m.isco.nosp@m..acos.nosp@m.ta@i.nosp@m.nria..nosp@m.fr; Hugues Larrive hugue.nosp@m.s.la.nosp@m.rrive.nosp@m.@pm..nosp@m.me

#include "cpu.h"

Include dependency graph for periph_cpu_common.h:

Data Structures
struct	atmega_gpio_port_t
	Structure describing the memory layout of the registers of a GPIO port on ATmega MCUs. More...

struct	pwm_conf_t
	PWM device configuration. More...

Macros
#define	GPIO_UNDEF (0xff)
	Definition of a fitting UNDEF value.

#define	GPIO_PIN(x, y) ((x << 4) \| y)
	Define a CPU specific GPIO pin generator macro.

#define	ATMEGA_GPIO_BASE_A 0x20
	Base of the GPIO registers as memory address.

#define	ATMEGA_GPIO_BASE_G (ATMEGA_GPIO_BASE_A + ATMEGA_GPIO_SIZE * ('G' - 'A'))
	Base of the GPIO port G register as memory address.

#define	ATMEGA_GPIO_BASE_H (0x100)
	Base of the GPIO registers of the second memory region (port >= H)

#define	ATMEGA_GPIO_SIZE (0x03)
	sizeof(atmega_gpio_port_t), but preprocessor friendly

#define	GPIO_EXT_INT_NUMOF <CPU_SPECIFIC>
	Number of external interrupt vectors.

#define	PERIPH_TIMER_PROVIDES_SET
	A low-level timer_set() implementation is provided.

#define	EEPROM_CLEAR_BYTE (0xff)
	EEPROM clear byte.

#define	WDT_HAS_STOP (1)
	WDT can be stopped on AVR.

Functions
static atmega_gpio_port_t *	atmega_gpio_port (uint8_t port_num)
	Get the GPIO PORT registers of the given GPIO PORT.

Length of the CPU_ID in octets
#define	CPUID_LEN (4U)

#define	PERIPH_SPI_NEEDS_INIT_CS
	Use some common SPI functions.

#define	PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define	PERIPH_SPI_NEEDS_TRANSFER_REG

#define	PERIPH_SPI_NEEDS_TRANSFER_REGS

WDT upper and lower bound times in ms
#define	NWDT_TIME_LOWER_LIMIT (1)

#define	NWDT_TIME_UPPER_LIMIT (8192U)

RTT configuration
#define	RTT_MAX_VALUE (0x00FFFFFF) /* 24-bit timer */

#define	RTT_FREQUENCY (1024U) /* in Hz. */

Bitmasks indicating which are the possible dividers for a timer
enum	timer_div_t { TIMER_DIV1_8_64_128_1024 = 0x549 , TIMER_DIV1_8_32_64_128_256_1024 = 0x5E9 }

Macro Definition Documentation

◆ ATMEGA_GPIO_BASE_A

#define ATMEGA_GPIO_BASE_A 0x20

Base of the GPIO registers as memory address.

Must be identical to the address of PINA provided by avr/io.h

Definition at line 85 of file periph_cpu_common.h.

◆ ATMEGA_GPIO_BASE_G

#define ATMEGA_GPIO_BASE_G (ATMEGA_GPIO_BASE_A + ATMEGA_GPIO_SIZE * ('G' - 'A'))

Base of the GPIO port G register as memory address.

Must be identical to the address of PING provided by avr/io.h

Definition at line 92 of file periph_cpu_common.h.

◆ ATMEGA_GPIO_BASE_H

#define ATMEGA_GPIO_BASE_H (0x100)

Base of the GPIO registers of the second memory region (port >= H)

Must be identical to the address of PINH provided by avr/io.h

Definition at line 98 of file periph_cpu_common.h.

◆ ATMEGA_GPIO_SIZE

#define ATMEGA_GPIO_SIZE (0x03)

sizeof(atmega_gpio_port_t), but preprocessor friendly

Definition at line 102 of file periph_cpu_common.h.

◆ CPUID_LEN

#define CPUID_LEN (4U)

Definition at line 38 of file periph_cpu_common.h.

◆ EEPROM_CLEAR_BYTE

#define EEPROM_CLEAR_BYTE (0xff)

EEPROM clear byte.

Definition at line 338 of file periph_cpu_common.h.

◆ GPIO_EXT_INT_NUMOF

#define GPIO_EXT_INT_NUMOF <CPU_SPECIFIC>

Number of external interrupt vectors.

Definition at line 108 of file periph_cpu_common.h.

◆ GPIO_PIN

#define GPIO_PIN	(	x,
		y
	)	((x << 4) \| y)

Define a CPU specific GPIO pin generator macro.

Definition at line 59 of file periph_cpu_common.h.

◆ GPIO_UNDEF

#define GPIO_UNDEF (0xff)

Definition of a fitting UNDEF value.

Definition at line 54 of file periph_cpu_common.h.

◆ NWDT_TIME_LOWER_LIMIT

#define NWDT_TIME_LOWER_LIMIT (1)

Definition at line 344 of file periph_cpu_common.h.

◆ NWDT_TIME_UPPER_LIMIT

#define NWDT_TIME_UPPER_LIMIT (8192U)

Definition at line 345 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_INIT_CS

#define PERIPH_SPI_NEEDS_INIT_CS

Use some common SPI functions.

Definition at line 253 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE

Definition at line 254 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

#define PERIPH_SPI_NEEDS_TRANSFER_REG

Definition at line 255 of file periph_cpu_common.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

#define PERIPH_SPI_NEEDS_TRANSFER_REGS

Definition at line 256 of file periph_cpu_common.h.

◆ PERIPH_TIMER_PROVIDES_SET

#define PERIPH_TIMER_PROVIDES_SET

A low-level timer_set() implementation is provided.

Definition at line 333 of file periph_cpu_common.h.

◆ RTT_FREQUENCY

#define RTT_FREQUENCY (1024U) /* in Hz. */

Definition at line 378 of file periph_cpu_common.h.

◆ RTT_MAX_VALUE

#define RTT_MAX_VALUE (0x00FFFFFF) /* 24-bit timer */

Definition at line 374 of file periph_cpu_common.h.

◆ WDT_HAS_STOP

#define WDT_HAS_STOP (1)

WDT can be stopped on AVR.

Definition at line 351 of file periph_cpu_common.h.

Enumeration Type Documentation

◆ timer_div_t

enum timer_div_t

Enumerator
TIMER_DIV1_8_64_128_1024	1/{1,8,64,128,1024}
TIMER_DIV1_8_32_64_128_256_1024	1/{1,8,32,64,128,256,1024}

Definition at line 313 of file periph_cpu_common.h.

Function Documentation

◆ atmega_gpio_port()

static atmega_gpio_port_t * atmega_gpio_port ( uint8_t port_num )

inlinestatic

Get the GPIO PORT registers of the given GPIO PORT.

Parameters

[in] port_num Number of the port to get the registers of

Returns: Pointer to the registers controlling the given GPIO PORT

Definition at line 159 of file periph_cpu_common.h.