Peripheral MCU configuration for Heltec WiFi LoRa 32 V2 board. More...
Peripheral MCU configuration for Heltec WiFi LoRa 32 V2 board.
Heltec WiFi LoRa 32 V2 is an ESP32 development board with 8 MB Flash that uses the EPS32 chip directly. It integrates a SemTech SX1276 or SX1278 for LoRaWAN communication in the 433 MHz or the 868/915 MHz band, respectively. Additionally, it has an OLED display connected via I2C on board.
For detailed information about the configuration of ESP32 boards, see section Common Peripherals.
Definition in file periph_conf.h.
#include <stdint.h>
#include "periph_conf_common.h"
Go to the source code of this file.
ADC and DAC channel configuration | |
#define | ADC_GPIOS |
Declaration of GPIOs that can be used as ADC channels. | |
#define | DAC_GPIOS { } |
Declaration of GPIOs that can be used as DAC channels. | |
I2C configuration | |
Only I2C interface I2C_DEV(0) is used.
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#define | I2C0_SPEED I2C_SPEED_FAST |
I2C bus speed of I2C_DEV(0) | |
#define | I2C0_SCL GPIO15 |
SCL signal of I2C_DEV(0) [UEXT1]. | |
#define | I2C0_SDA GPIO4 |
SDA signal of I2C_DEV(0) [UEXT1]. | |
PWM channel configuration | |
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#define | PWM0_GPIOS { GPIO25, GPIO0, GPIO2, GPIO17 } |
PWM channels for device PWM_DEV(0) | |
#define | PWM1_GPIOS { GPIO22, GPIO23 } |
PWM_DEV(1) is not used. | |
SPI configuration | |
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#define | SPI0_CTRL VSPI |
VSPI is used as SPI_DEV(0) | |
#define | SPI0_SCK GPIO5 |
VSPI SCK. | |
#define | SPI0_MISO GPIO19 |
VSPI MISO. | |
#define | SPI0_MOSI GPIO27 |
VSPI MOSI. | |
#define | SPI0_CS0 GPIO18 |
VSPI CS0. | |
UART configuration | |
ESP32 provides 3 UART interfaces at maximum: UART_DEV(0) uses fixed standard configuration. | |
#define | UART0_TXD GPIO1 |
direct I/O pin for UART_DEV(0) TxD, can't be changed | |
#define | UART0_RXD GPIO3 |
direct I/O pin for UART_DEV(0) RxD, can't be changed | |
#define | UART1_TXD GPIO10 |
direct I/O pin for UART_DEV(1) TxD | |
#define | UART1_RXD GPIO9 |
direct I/O pin for UART_DEV(1) RxD | |
#define ADC_GPIOS |
Declaration of GPIOs that can be used as ADC channels.
Definition at line 52 of file periph_conf.h.
#define DAC_GPIOS { } |
Declaration of GPIOs that can be used as DAC channels.
Since all DAC GPIOs are used for board control functions, there are no GPIOs left that can be used as DAC channels.
Definition at line 67 of file periph_conf.h.
#define I2C0_SCL GPIO15 |
SCL signal of I2C_DEV(0) [UEXT1].
Definition at line 86 of file periph_conf.h.
#define I2C0_SDA GPIO4 |
SDA signal of I2C_DEV(0) [UEXT1].
Definition at line 89 of file periph_conf.h.
#define I2C0_SPEED I2C_SPEED_FAST |
I2C bus speed of I2C_DEV(0)
Definition at line 83 of file periph_conf.h.
#define PWM0_GPIOS { GPIO25, GPIO0, GPIO2, GPIO17 } |
PWM channels for device PWM_DEV(0)
Definition at line 104 of file periph_conf.h.
#define PWM1_GPIOS { GPIO22, GPIO23 } |
PWM_DEV(1) is not used.
Definition at line 109 of file periph_conf.h.
#define SPI0_CS0 GPIO18 |
VSPI CS0.
Definition at line 137 of file periph_conf.h.
#define SPI0_CTRL VSPI |
VSPI is used as SPI_DEV(0)
Definition at line 125 of file periph_conf.h.
#define SPI0_MISO GPIO19 |
VSPI MISO.
Definition at line 131 of file periph_conf.h.
#define SPI0_MOSI GPIO27 |
VSPI MOSI.
Definition at line 134 of file periph_conf.h.
#define SPI0_SCK GPIO5 |
VSPI SCK.
Definition at line 128 of file periph_conf.h.
#define UART0_RXD GPIO3 |
direct I/O pin for UART_DEV(0) RxD, can't be changed
Definition at line 153 of file periph_conf.h.
#define UART0_TXD GPIO1 |
direct I/O pin for UART_DEV(0) TxD, can't be changed
Definition at line 152 of file periph_conf.h.
#define UART1_RXD GPIO9 |
direct I/O pin for UART_DEV(1) RxD
Definition at line 160 of file periph_conf.h.
#define UART1_TXD GPIO10 |
direct I/O pin for UART_DEV(1) TxD
Definition at line 157 of file periph_conf.h.