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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2015 Hamburg University of Applied Sciences
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include "periph_cpu.h"
19#include "clk_conf.h"
20
21#ifdef __cplusplus
22extern "C" {
23#endif
24
29static const timer_conf_t timer_config[] = {
30 {
31 .dev = TIM5,
32 .max = 0x0000ffff,
33 .rcc_mask = RCC_APB1ENR_TIM5EN,
34 .bus = APB1,
35 .irqn = TIM5_IRQn
36 }
37};
38
39#define TIMER_0_ISR (isr_tim5)
40
41#define TIMER_NUMOF ARRAY_SIZE(timer_config)
43
48static const uart_conf_t uart_config[] = {
49 {
50 .dev = USART3,
51 .rcc_mask = RCC_APB1ENR_USART3EN,
52 .rx_pin = GPIO_PIN(PORT_C, 11),
53 .tx_pin = GPIO_PIN(PORT_C, 10),
54 .rx_af = GPIO_AF7,
55 .tx_af = GPIO_AF7,
56 .bus = APB1,
57 .irqn = USART3_IRQn
58 },
59 {
60 .dev = USART1,
61 .rcc_mask = RCC_APB2ENR_USART1EN,
62 .rx_pin = GPIO_PIN(PORT_A, 10),
63 .tx_pin = GPIO_PIN(PORT_A, 9),
64 .rx_af = GPIO_AF7,
65 .tx_af = GPIO_AF7,
66 .bus = APB2,
67 .irqn = USART1_IRQn
68 }
69};
70
71#define UART_0_ISR (isr_usart3)
72#define UART_1_ISR (isr_usart1)
73
74#define UART_NUMOF ARRAY_SIZE(uart_config)
76
81static const spi_conf_t spi_config[] = {
82 {
83 .dev = SPI1,
84 .mosi_pin = GPIO_PIN(PORT_A, 7),
85 .miso_pin = GPIO_PIN(PORT_A, 6),
86 .sclk_pin = GPIO_PIN(PORT_A, 5),
87 .cs_pin = SPI_CS_UNDEF,
88 .mosi_af = GPIO_AF5,
89 .miso_af = GPIO_AF5,
90 .sclk_af = GPIO_AF5,
91 .cs_af = GPIO_AF5,
92 .rccmask = RCC_APB2ENR_SPI1EN,
93 .apbbus = APB2
94 },
95 {
96 .dev = SPI3,
97 .mosi_pin = GPIO_PIN(PORT_B, 5),
98 .miso_pin = GPIO_PIN(PORT_B, 4),
99 .sclk_pin = GPIO_PIN(PORT_B, 3),
100 .cs_pin = SPI_CS_UNDEF,
101 .mosi_af = GPIO_AF6,
102 .miso_af = GPIO_AF6,
103 .sclk_af = GPIO_AF6,
104 .cs_af = GPIO_AF6,
105 .rccmask = RCC_APB1ENR_SPI3EN,
106 .apbbus = APB1
107 }
108};
109
110#define SPI_NUMOF ARRAY_SIZE(spi_config)
112
117static const i2c_conf_t i2c_config[] = {
118 {
119 .dev = I2C1,
120 .speed = I2C_SPEED_NORMAL,
121 .scl_pin = GPIO_PIN(PORT_B, 8),
122 .sda_pin = GPIO_PIN(PORT_B, 9),
123 .scl_af = GPIO_AF4,
124 .sda_af = GPIO_AF4,
125 .bus = APB1,
126 .rcc_mask = RCC_APB1ENR_I2C1EN,
127 .clk = CLOCK_APB1,
128 .irqn = I2C1_EV_IRQn
129 },
130 {
131 .dev = I2C2,
132 .speed = I2C_SPEED_NORMAL,
133 .scl_pin = GPIO_PIN(PORT_B, 10),
134 .sda_pin = GPIO_PIN(PORT_B, 11),
135 .scl_af = GPIO_AF4,
136 .sda_af = GPIO_AF4,
137 .bus = APB1,
138 .rcc_mask = RCC_APB1ENR_I2C2EN,
139 .clk = CLOCK_APB1,
140 .irqn = I2C2_EV_IRQn
141 }
142};
143
144#define I2C_0_ISR isr_i2c1_ev
145#define I2C_1_ISR isr_i2c2_ev
146
147#define I2C_NUMOF ARRAY_SIZE(i2c_config)
149
150#ifdef __cplusplus
151}
152#endif
153
@ PORT_B
port B
Definition periph_cpu.h:47
@ PORT_C
port C
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:105
@ GPIO_AF6
use alternate function 6
Definition cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.
Definition periph_cpu.h:263
UART device configuration.
Definition periph_cpu.h:217