periph_cpu.h
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1/*
2 * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
3 * 2023 Gunar Schorcht <gunar@schorcht.net>
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser General
6 * Public License v2.1. See the file LICENSE in the top level directory for more
7 * details.
8 */
9
21#ifndef PERIPH_CPU_H
22#define PERIPH_CPU_H
23
24#include <inttypes.h>
25
26#include "cpu.h"
27#include "clic.h"
28#include "kernel_defines.h"
29#include "macros/units.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
42#define PM_NUM_MODES (3U)
60enum {
63 GD32V_PM_IDLE = 2
64};
65
69#ifndef CONFIG_PM_EWUP_USED
70#define CONFIG_PM_EWUP_USED (0U)
71#endif
77typedef enum {
81} bus_t;
82
86enum {
87#ifdef GPIOA
88 PORT_A = 0,
89#endif
90#ifdef GPIOB
91 PORT_B = 1,
92#endif
93#ifdef GPIOC
94 PORT_C = 2,
95#endif
96#ifdef GPIOD
97 PORT_D = 3,
98#endif
99#ifdef GPIOE
100 PORT_E = 4,
101#endif
102};
103
104#ifndef DOXYGEN
109#define HAVE_GPIO_T
110typedef uint32_t gpio_t;
116#define GPIO_UNDEF (0xffffffff)
117
121#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
122
131#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
132
139#define HAVE_GPIO_MODE_T
140typedef enum {
141 GPIO_IN = GPIO_MODE(0, 1, 0),
142 GPIO_IN_PD = GPIO_MODE(0, 2, 0),
143 GPIO_IN_PU = GPIO_MODE(0, 2, 1),
144 GPIO_OUT = GPIO_MODE(3, 0, 0),
145 GPIO_OD = GPIO_MODE(3, 1, 0),
146 GPIO_OD_PU = (0xff)
154#define HAVE_GPIO_FLANK_T
155typedef enum {
156 GPIO_RISING = 1,
157 GPIO_FALLING = 2,
158 GPIO_BOTH = 3
161#endif /* ndef DOXYGEN */
162
166typedef enum {
169} gpio_af_t;
170
177void gpio_init_af(gpio_t pin, gpio_af_t af);
178
184void gpio_init_analog(gpio_t pin);
185
186/* Hide this from Doxygen to avoid merging implementation details into
187 * public view on type */
188#ifndef DOXYGEN
189
190#define HAVE_GPIO_STATE_T
191typedef enum {
199
200#define HAVE_GPIO_PULL_T
201typedef enum {
207
208#define HAVE_GPIO_PULL_STRENGTH_T
209typedef enum {
211 GPIO_PULL_WEAK = 0,
215
216#define HAVE_GPIO_DRIVE_STRENGTH_T
217typedef enum {
219 GPIO_DRIVE_WEAK = 0,
223
224#define HAVE_GPIO_SLEW_T
225typedef enum {
227 GPIO_SLEW_SLOW = 1,
228 GPIO_SLEW_FAST = 2,
231
232#define HAVE_GPIO_CONF_T
233typedef union gpio_conf_gd32v gpio_conf_t;
234
235#endif /* !DOXYGEN */
236
242 uint8_t bits;
243 struct {
276 };
277};
278
282#define ADC_DEVS (2U)
283
287typedef struct {
288 gpio_t pin;
289 uint8_t dev;
290 uint8_t chan;
291} adc_conf_t;
292
296#define DAC_CHANNEL_NUMOF (2)
297
301typedef struct {
302 gpio_t pin;
303 uint8_t chan;
304} dac_conf_t;
305
309#define TIMER_CHANNEL_NUMOF (4U)
310
314#define TIMER_CHANNEL(tim, chan) *(&dev(tim)->CH0CV + (chan * 2))
315
319typedef struct {
320 TIMER_Type *dev;
321 uint32_t max;
322 uint32_t rcu_mask;
323 uint8_t bus;
324 uint8_t irqn;
326
330typedef struct {
331 USART_Type *dev;
332 uint32_t rcu_mask;
333 gpio_t rx_pin;
334 gpio_t tx_pin;
335 uint8_t bus;
336 uint8_t irqn;
338
342#define UART_ISR_PRIO (2)
343
350#define SPI_HWCS_MASK (0xffffff00)
351
358#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
359
363#define SPI_CS_UNDEF (GPIO_UNDEF)
364
365#ifndef DOXYGEN
370#define HAVE_SPI_CS_T
371typedef uint32_t spi_cs_t;
373#endif
374
380#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
382#define PERIPH_SPI_NEEDS_TRANSFER_REG
384#define PERIPH_SPI_NEEDS_TRANSFER_REGS
391#define HAVE_SPI_CLK_T
392enum {
398};
399
403typedef uint32_t spi_clk_t;
409typedef struct {
410 SPI_Type *dev;
411 gpio_t mosi_pin;
412 gpio_t miso_pin;
413 gpio_t sclk_pin;
414 spi_cs_t cs_pin;
415 uint32_t rcumask;
416 uint8_t apbbus;
417#ifdef MODULE_PERIPH_DMA
418 dma_t tx_dma;
419 uint8_t tx_dma_chan;
420 dma_t rx_dma;
421 uint8_t rx_dma_chan;
422#endif
423} spi_conf_t;
424
430#define PERIPH_I2C_NEED_READ_REG
432#define PERIPH_I2C_NEED_WRITE_REG
434#define PERIPH_I2C_NEED_READ_REGS
436#define PERIPH_I2C_NEED_WRITE_REGS
439#ifndef DOXYGEN
444#define HAVE_I2C_SPEED_T
445typedef enum {
446 I2C_SPEED_LOW = KHZ(10),
447 I2C_SPEED_NORMAL = KHZ(100),
448 I2C_SPEED_FAST = KHZ(400),
452#endif /* ndef DOXYGEN */
453
457typedef struct {
458 I2C_Type *dev;
459 i2c_speed_t speed;
460 gpio_t scl_pin;
461 gpio_t sda_pin;
462 uint32_t rcu_mask;
464} i2c_conf_t;
465
469typedef struct {
470 gpio_t pin;
471 uint8_t cc_chan;
472} pwm_chan_t;
473
477typedef struct {
478 TIMER_Type *dev;
479 uint32_t rcu_mask;
480 uint32_t remap;
486 uint8_t bus;
487} pwm_conf_t;
488
493#define NWDT_TIME_LOWER_LIMIT (1)
494/* Ensure the internal "count" variable stays within the uint32 bounds.
495 This variable corresponds to max_time * RTC_FREQ / MS_PER_SEC. On fe310,
496 RTC_FREQ is 32768Hz. The 15 right shift is equivalent to a division by RTC_FREQ.
497 */
498#define NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * MS_PER_SEC + 1)
504#define WDT_INTR_PRIORITY (PLIC_NUM_PRIORITIES)
505
509#define WDT_HAS_STOP (0)
510
515#define RTT_DEV RTC
517#define RTT_IRQ RTC_ALARM_IRQn
518#define RTT_IRQ_PRIORITY (2)
519#define RTT_MAX_VALUE (0xffffffff)
521#define RTT_MIN_FREQUENCY (1U)
528#define USBDEV_SET_ADDR_AFTER_STATUS 0
529#define USBDEV_NUM_ENDPOINTS 4
538void periph_clk_en(bus_t bus, uint32_t mask);
539
546void periph_clk_dis(bus_t bus, uint32_t mask);
547
555uint32_t periph_apb_clk(bus_t bus);
556
563void gpio_init_af(gpio_t pin, gpio_af_t af);
564
565void gd32vf103_clock_init(void);
566void gd32v_enable_irc8(void);
567void gd32v_disable_irc8(void);
568
569#ifdef __cplusplus
570}
571#endif
572
573#endif /* PERIPH_CPU_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_C
port C
Definition: periph_cpu.h:49
@ PORT_E
port E
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
gpio_flank_t
Definition: periph_cpu.h:180
GPIO_MODE
Definition: periph_cpu.h:149
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:165
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:164
i2c_speed_t
Definition: periph_cpu.h:276
spi_clk_t
Definition: periph_cpu.h:352
void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over)
Configure an alternate function for the given pin.
gpio_t adc_conf_t
ADC configuration wrapper.
Definition: periph_cpu.h:337
RISCV CLIC interrupt controller definitions.
gpio_af_t
Override alternative GPIO mode options.
Definition: periph_cpu.h:166
@ GPIO_AF_OUT_OD
alternate function output - open-drain
Definition: periph_cpu.h:168
@ GPIO_AF_OUT_PP
alternate function output - push-pull
Definition: periph_cpu.h:167
uint32_t periph_apb_clk(bus_t bus)
Get the actual bus clock frequency for the APB buses.
#define TIMER_CHANNEL_NUMOF
GD32V timers have 4 capture-compare channels.
Definition: periph_cpu.h:309
void gpio_init_analog(gpio_t pin)
Configure the given pin to be used as ADC input.
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
@ GD32V_PM_IDLE
IDLE mode.
Definition: periph_cpu.h:63
@ GD32V_PM_STANDBY
STANDBY mode,
Definition: periph_cpu.h:61
@ GD32V_PM_DEEPSLEEP
DEEPSLEEP mode, corresponds to STOP mode of STM32.
Definition: periph_cpu.h:62
void periph_clk_dis(bus_t bus, uint32_t mask)
Disable the given peripheral clock.
bus_t
On-Chip buses.
Definition: periph_cpu.h:77
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ AHB
Advanced High-performance Bus.
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
enum IRQn IRQn_Type
Interrupt Number Definition.
gpio_pull_t
Enumeration of pull resistor configurations.
Definition: gpio_ll.h:225
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition: gpio_ll.h:243
gpio_state_t
Enumeration of GPIO states (direction)
Definition: gpio_ll.h:133
gpio_slew_t
Enumeration of slew rate settings.
Definition: gpio_ll.h:307
gpio_drive_strength_t
Enumeration of drive strength options.
Definition: gpio_ll.h:274
typedef gpio_conf_t
GPIO pin configuration.
Definition: gpio_ll.h:391
@ GPIO_FLOATING
No pull ups nor pull downs enabled.
Definition: gpio_ll.h:226
@ GPIO_PULL_KEEP
Keep the signal at current logic level with pull up/down resistors.
Definition: gpio_ll.h:229
@ GPIO_PULL_DOWN
Pull down resistor enabled.
Definition: gpio_ll.h:228
@ GPIO_PULL_UP
Pull up resistor enabled.
Definition: gpio_ll.h:227
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition: gpio_ll.h:244
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition: gpio_ll.h:245
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition: gpio_ll.h:246
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition: gpio_ll.h:247
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition: gpio_ll.h:170
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition: gpio_ll.h:189
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition: gpio_ll.h:157
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition: gpio_ll.h:144
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition: gpio_ll.h:217
@ GPIO_INPUT
Use pin as input.
Definition: gpio_ll.h:176
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition: gpio_ll.h:308
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition: gpio_ll.h:311
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition: gpio_ll.h:310
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition: gpio_ll.h:312
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition: gpio_ll.h:277
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition: gpio_ll.h:276
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition: gpio_ll.h:278
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition: gpio_ll.h:275
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:91
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:93
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:94
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:95
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:123
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:121
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:125
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:120
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition: periph_cpu.h:280
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: periph_cpu.h:277
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
Definition: spi.h:135
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:353
Adds include for missing inttype definitions.
Common macros and compiler attributes/pragmas configuration.
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:82
unsigned dma_t
DMA channel type.
uint8_t dev
ADCx - 1 device used for the channel.
Definition: periph_cpu.h:289
gpio_t pin
pin connected to the channel
Definition: periph_cpu.h:288
uint8_t chan
CPU ADC channel connected to the pin.
Definition: periph_cpu.h:290
DAC line configuration data.
Definition: periph_cpu.h:301
uint8_t chan
DAC device used for this line.
Definition: periph_cpu.h:303
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:302
I2C configuration structure.
Definition: periph_cpu.h:299
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:462
IRQn_Type irqn
I2C event interrupt number.
Definition: periph_cpu.h:463
I2C_Type * dev
i2c device
Definition: periph_cpu.h:458
PWM channel.
Definition: periph_cpu.h:469
gpio_t pin
GPIO pin mapped to this channel.
Definition: periph_cpu.h:470
uint8_t cc_chan
capture compare channel used
Definition: periph_cpu.h:471
PWM device configuration.
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:479
uint32_t remap
AFIO remap mask to route periph to other pins (or zero, if not needed)
Definition: periph_cpu.h:480
gpio_af_t af
alternate function used
Definition: periph_cpu.h:485
TIMER_Type * dev
Timer used.
Definition: periph_cpu.h:478
uint8_t bus
APB bus.
Definition: periph_cpu.h:486
SPI device configuration.
Definition: periph_cpu.h:337
uint32_t rcumask
bit in the RCC peripheral enable register
Definition: periph_cpu.h:415
gpio_t sclk_pin
SCLK pin.
Definition: periph_cpu.h:413
uint8_t apbbus
APBx bus the device is connected to.
Definition: periph_cpu.h:416
SPI_Type * dev
SPI device base register address.
Definition: periph_cpu.h:410
Timer device configuration.
Definition: periph_cpu.h:264
uint8_t irqn
global IRQ channel
Definition: periph_cpu.h:324
uint8_t bus
APBx bus the timer is clock from.
Definition: periph_cpu.h:323
TIMER_Type * dev
timer device
Definition: periph_cpu.h:320
uint32_t max
maximum value to count to (16/32 bit)
Definition: periph_cpu.h:321
uint32_t rcu_mask
corresponding bit in the RCC register
Definition: periph_cpu.h:322
UART device configuration.
Definition: periph_cpu.h:218
USART_Type * dev
UART device base register address.
Definition: periph_cpu.h:331
uint8_t irqn
IRQ channel.
Definition: periph_cpu.h:336
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:332
uint8_t bus
APB bus.
Definition: periph_cpu.h:335
GPIO pin configuration for GD32V MCUs.
Definition: periph_cpu.h:241
gpio_pull_t pull
Pull resistor configuration.
Definition: periph_cpu.h:251
gpio_slew_t slew_rate
Configure the slew rate of outputs.
Definition: periph_cpu.h:261
bool initial_value
Initial value of the output.
Definition: periph_cpu.h:275
uint8_t bits
the raw bits
Definition: periph_cpu.h:242
gpio_state_t state
State of the pin.
Definition: periph_cpu.h:247
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition: units.h:49
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition: units.h:44