spi.h
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1 /*
2  * Copyright (C) 2014-2016 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
66 #ifndef PERIPH_SPI_H
67 #define PERIPH_SPI_H
68 
69 #include <errno.h>
70 #include <limits.h>
71 #include <stdbool.h>
72 #include <stddef.h>
73 #include <stdint.h>
74 
75 #include "periph_cpu.h"
76 #include "periph_conf.h"
77 #include "periph/gpio.h"
78 
79 #ifdef __cplusplus
80 extern "C" {
81 #endif
82 
86 #ifndef SPI_DEV
87 #define SPI_DEV(x) (x)
88 #endif
89 
93 #ifndef SPI_UNDEF
94 #define SPI_UNDEF (UINT_MAX)
95 #endif
96 
100 #ifndef SPI_CS_UNDEF
101 #define SPI_CS_UNDEF (GPIO_UNDEF)
102 #endif
103 
111 #ifndef SPI_HWCS
112 #define SPI_HWCS(x) (SPI_CS_UNDEF)
113 #endif
114 
118 #ifndef HAVE_SPI_T
119 typedef unsigned int spi_t;
120 #endif
121 
126 #ifndef HAVE_SPI_CS_T
127 typedef gpio_t spi_cs_t;
128 #endif
129 
136 enum {
137  SPI_OK = 0,
142 };
143 
160 #ifndef HAVE_SPI_MODE_T
161 typedef enum {
166 } spi_mode_t;
167 #endif
168 
176 #ifndef HAVE_SPI_CLK_T
177 typedef enum {
183 } spi_clk_t;
184 #endif
185 
205 void spi_init(spi_t bus);
206 
224 void spi_init_pins(spi_t bus);
225 
245 int spi_init_cs(spi_t bus, spi_cs_t cs);
246 
247 #if defined(MODULE_PERIPH_SPI_RECONFIGURE) || DOXYGEN
248 
269 void spi_deinit_pins(spi_t dev);
270 
271 #if DOXYGEN
272 
283 gpio_t spi_pin_miso(spi_t dev);
284 
295 gpio_t spi_pin_mosi(spi_t dev);
296 
307 gpio_t spi_pin_clk(spi_t dev);
308 
309 #endif /* DOXYGEN */
310 #endif /* MODULE_PERIPH_SPI_RECONFIGURE */
311 
312 #if defined(MODULE_PERIPH_SPI_GPIO_MODE) || DOXYGEN
313 
317 typedef struct {
322 
332 int spi_init_with_gpio_mode(spi_t bus, spi_gpio_mode_t mode);
333 #endif
334 
358 int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk);
359 
368 void spi_release(spi_t bus);
369 
381 uint8_t spi_transfer_byte(spi_t bus, spi_cs_t cs, bool cont, uint8_t out);
382 
394 void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
395  const void *out, void *in, size_t len);
396 
411 uint8_t spi_transfer_reg(spi_t bus, spi_cs_t cs, uint8_t reg, uint8_t out);
412 
427 void spi_transfer_regs(spi_t bus, spi_cs_t cs, uint8_t reg,
428  const void *out, void *in, size_t len);
429 
430 #ifdef __cplusplus
431 }
432 #endif
433 
434 #endif /* PERIPH_SPI_H */
435 
CPOL=0, CPHA=1.
Definition: spi.h:163
gpio_mode_t sclk
GPIO mode used for SCLK pin.
Definition: spi.h:320
selected mode is not supported
Definition: spi.h:140
gpio_mode_t mosi
GPIO mode used for MOSI pin.
Definition: spi.h:318
Low-level GPIO peripheral driver interface definitions.
#define ENXIO
No such device or address.
Definition: errno.h:132
CPOL=0, CPHA=0.
Definition: spi.h:162
drive the SPI bus with 100KHz
Definition: spi.h:178
drive the SPI bus with 400KHz
Definition: spi.h:179
gpio_t spi_pin_clk(spi_t dev)
Get the CLK pin of the given SPI bus.
void spi_release(spi_t bus)
Finish an ongoing SPI transaction by releasing the given SPI bus.
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
Definition: spi.h:127
spi_mode_t
Available SPI modes, defining the configuration of clock polarity and clock phase.
Definition: spi.h:161
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
Start a new SPI transaction.
#define EINVAL
Invalid argument.
Definition: errno.h:97
everything went as planned
Definition: spi.h:137
spi_clk_t
Available SPI clock speeds.
Definition: spi.h:177
CPOL=1, CPHA=1.
Definition: spi.h:165
void spi_transfer_regs(spi_t bus, spi_cs_t cs, uint8_t reg, const void *out, void *in, size_t len)
Transfer a number of bytes to/from a given register address.
void spi_init(spi_t bus)
Basic initialization of the given SPI bus.
drive the SPI bus with 5MHz
Definition: spi.h:181
int spi_init_with_gpio_mode(spi_t bus, spi_gpio_mode_t mode)
Initialize MOSI/MISO/SCLK pins with adapted GPIO modes.
drive the SPI bus with 10MHz
Definition: spi.h:182
drive the SPI bus with 1MHz
Definition: spi.h:180
uint8_t spi_transfer_reg(spi_t bus, spi_cs_t cs, uint8_t reg, uint8_t out)
Transfer one byte to/from a given register address.
SPI gpio mode.
Definition: spi.h:317
int spi_init_cs(spi_t bus, spi_cs_t cs)
Initialize the given chip select pin.
gpio_t spi_pin_miso(spi_t dev)
Get the MISO pin of the given SPI bus.
void spi_init_pins(spi_t bus)
Initialize the used SPI bus pins, i.e.
CPOL=1, CPHA=0.
Definition: spi.h:164
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:82
uint8_t spi_transfer_byte(spi_t bus, spi_cs_t cs, bool cont, uint8_t out)
Transfer one byte on the given SPI bus.
invalid SPI bus specified
Definition: spi.h:138
void spi_deinit_pins(spi_t dev)
Change the pins of the given SPI bus back to plain GPIO functionality.
gpio_mode_t miso
GPIO mode used for MISO pin.
Definition: spi.h:319
selected clock value is not supported
Definition: spi.h:141
invalid chip select line specified
Definition: spi.h:139
void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, const void *out, void *in, size_t len)
Transfer a number bytes using the given SPI bus.
unsigned int spi_t
Default type for SPI devices.
Definition: spi.h:119
gpio_t spi_pin_mosi(spi_t dev)
Get the MOSI pin of the given SPI bus.