26#ifndef CONFIG_BOARD_HAS_LSE 
   27#define CONFIG_BOARD_HAS_LSE            1 
   30#include "periph_cpu.h" 
   45        .rcc_mask = RCC_APB2ENR_USART1EN,
 
   55        .rcc_mask = RCC_APB1ENR_USART2EN,
 
   65#define UART_0_ISR          (isr_usart1) 
   66#define UART_1_ISR          (isr_usart2) 
   68#define UART_NUMOF          ARRAY_SIZE(uart_config) 
   93        .rccmask  = RCC_APB2ENR_SPI1EN,
 
  106        .rccmask  = RCC_APB1ENR_SPI2EN,
 
  111#define SPI_NUMOF           ARRAY_SIZE(spi_config) 
  127        .rcc_mask       = RCC_APB1ENR_I2C1EN,
 
  133#define I2C_0_ISR           isr_i2c1_ev 
  135#define I2C_NUMOF           ARRAY_SIZE(i2c_config) 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
 
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
 
Common configuration for STM32 Timer peripheral based on TIM2.
 
@ GPIO_AF5
use alternate function 5
 
@ GPIO_AF4
use alternate function 4
 
@ GPIO_AF7
use alternate function 7
 
@ APB1
Advanced Peripheral Bus 1.
 
@ APB2
Advanced Peripheral Bus 2.
 
I2C configuration structure.
 
SPI device configuration.
 
UART device configuration.