Peripheral MCU configuration for the STM32F3discovery board.
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Peripheral MCU configuration for the STM32F3discovery board.
- Author
- Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de
Definition in file periph_conf.h.
#include "periph_cpu.h"
#include "clk_conf.h"
Go to the source code of this file.
◆ CONFIG_BOARD_HAS_HSE
#define CONFIG_BOARD_HAS_HSE 1 |
◆ DAC_NUMOF
◆ I2C_0_ISR
#define I2C_0_ISR isr_i2c1_er |
◆ I2C_1_ISR
#define I2C_1_ISR isr_i2c2_er |
◆ I2C_NUMOF
◆ PWM_NUMOF
◆ SPI_NUMOF
◆ TIMER_0_ISR
#define TIMER_0_ISR isr_tim2 |
◆ TIMER_NUMOF
◆ UART_0_ISR
#define UART_0_ISR (isr_usart1) |
◆ UART_1_ISR
#define UART_1_ISR (isr_usart2) |
◆ UART_2_ISR
#define UART_2_ISR (isr_usart3) |
◆ UART_NUMOF
◆ dac_config
Initial value:= {
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition at line 38 of file periph_conf.h.
◆ i2c_config
Initial value:= {
{
.dev = I2C1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.rcc_sw_mask = RCC_CFGR3_I2C1SW,
.irqn = I2C1_ER_IRQn
},
{
.dev = I2C2,
.rcc_mask = RCC_APB1ENR_I2C2EN,
.rcc_sw_mask = RCC_CFGR3_I2C2SW,
.irqn = I2C2_ER_IRQn
}
}
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ GPIO_AF4
use alternate function 4
@ APB1
Advanced Peripheral Bus 1
Definition at line 178 of file periph_conf.h.
◆ pwm_config
Initial value:= {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
}
}
@ GPIO_AF2
use alternate function 2
Definition at line 112 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = SPI1,
.rccmask = RCC_APB2ENR_SPI1EN,
},
{
.dev = SPI3,
.rccmask = RCC_APB1ENR_SPI3EN,
}
}
@ GPIO_AF5
use alternate function 5
@ GPIO_AF6
use alternate function 6
#define SPI_CS_UNDEF
Define value for unused CS line.
@ APB2
Advanced Peripheral Bus 2
Definition at line 142 of file periph_conf.h.
◆ timer_config
Initial value:= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.irqn = TIM2_IRQn
}
}
Definition at line 49 of file periph_conf.h.
◆ uart_config