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periph_conf.h File Reference

Peripheral MCU configuration for the STM32F3discovery board. More...

Detailed Description

Peripheral MCU configuration for the STM32F3discovery board.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_HSE   1
 

DAC configuration

#define DAC_NUMOF   ARRAY_SIZE(dac_config)
 
static const dac_conf_t dac_config []
 

Timer configuration

#define TIMER_0_ISR   isr_tim2
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_usart1)
 
#define UART_1_ISR   (isr_usart2)
 
#define UART_2_ISR   (isr_usart3)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_0_ISR   isr_i2c1_er
 
#define I2C_1_ISR   isr_i2c2_er
 
#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_HSE

#define CONFIG_BOARD_HAS_HSE   1

Definition at line 24 of file periph_conf.h.

◆ DAC_NUMOF

#define DAC_NUMOF   ARRAY_SIZE(dac_config)

Definition at line 42 of file periph_conf.h.

◆ I2C_0_ISR

#define I2C_0_ISR   isr_i2c1_er

Definition at line 205 of file periph_conf.h.

◆ I2C_1_ISR

#define I2C_1_ISR   isr_i2c2_er

Definition at line 206 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)

Definition at line 208 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 135 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 171 of file periph_conf.h.

◆ TIMER_0_ISR

#define TIMER_0_ISR   isr_tim2

Definition at line 59 of file periph_conf.h.

◆ TIMER_NUMOF

#define TIMER_NUMOF   ARRAY_SIZE(timer_config)

Definition at line 61 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart1)

Definition at line 101 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_usart2)

Definition at line 102 of file periph_conf.h.

◆ UART_2_ISR

#define UART_2_ISR   (isr_usart3)

Definition at line 103 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 105 of file periph_conf.h.

Variable Documentation

◆ dac_config

const dac_conf_t dac_config[]
static
Initial value:
= {
{ .pin = GPIO_PIN(PORT_A, 4), .chan = 0 }
}
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46

Definition at line 38 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = I2C1,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_B, 6),
.sda_pin = GPIO_PIN(PORT_B, 7),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.rcc_sw_mask = RCC_CFGR3_I2C1SW,
.irqn = I2C1_ER_IRQn
},
{
.dev = I2C2,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_F, 1),
.sda_pin = GPIO_PIN(PORT_F, 0),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C2EN,
.rcc_sw_mask = RCC_CFGR3_I2C2SW,
.irqn = I2C2_ER_IRQn
}
}
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_F
port F
Definition periph_cpu.h:52
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

Definition at line 178 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 12), .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_D, 13), .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_D, 14), .cc_chan = 2},
{ .pin = GPIO_PIN(PORT_D, 15), .cc_chan = 3} },
.af = GPIO_AF2,
.bus = APB1
}
}
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_D
port D
Definition periph_cpu.h:50
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:104

Definition at line 112 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
{
.dev = SPI3,
.mosi_pin = GPIO_PIN(PORT_C, 12),
.miso_pin = GPIO_PIN(PORT_C, 11),
.sclk_pin = GPIO_PIN(PORT_C, 10),
.cs_pin = GPIO_PIN(PORT_A, 15),
.mosi_af = GPIO_AF6,
.miso_af = GPIO_AF6,
.sclk_af = GPIO_AF6,
.cs_af = GPIO_AF6,
.rccmask = RCC_APB1ENR_SPI3EN,
.apbbus = APB1
}
}
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF6
use alternate function 6
Definition cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 142 of file periph_conf.h.

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
}

Definition at line 49 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static

Definition at line 68 of file periph_conf.h.