cfg_clock_default_120.h File Reference

Default STM32F2/4/7 clock configuration for 120MHz boards. More...

Detailed Description

Default STM32F2/4/7 clock configuration for 120MHz boards.

Author

Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Vincent Dupont vince.nosp@m.nt@o.nosp@m.takey.nosp@m.s.co.nosp@m.m

Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file cfg_clock_default_120.h.

#include "kernel_defines.h"
#include "macros/units.h"

Include dependency graph for cfg_clock_default_120.h:

Go to the source code of this file.

Clock PLL settings (120MHz)
#define	CONFIG_CLOCK_PLL_M   (4)
#define	CONFIG_CLOCK_PLL_N   (60)
#define	CONFIG_CLOCK_PLL_P   (2)
#define	CONFIG_CLOCK_PLL_Q   (5)

Clock bus settings (APB1 and APB2)
#define	CONFIG_CLOCK_APB1_DIV   (4) /* max 30MHz */
#define	CONFIG_CLOCK_APB2_DIV   (2) /* max 60MHz */

Macro Definition Documentation

CONFIG_CLOCK_APB1_DIV

#define CONFIG_CLOCK_APB1_DIV   (4) /* max 30MHz */

Definition at line 62 of file cfg_clock_default_120.h.

CONFIG_CLOCK_APB2_DIV

#define CONFIG_CLOCK_APB2_DIV   (2) /* max 60MHz */

Definition at line 65 of file cfg_clock_default_120.h.

CONFIG_CLOCK_PLL_M

#define CONFIG_CLOCK_PLL_M   (4)

Definition at line 40 of file cfg_clock_default_120.h.

CONFIG_CLOCK_PLL_N

#define CONFIG_CLOCK_PLL_N   (60)

Definition at line 46 of file cfg_clock_default_120.h.

CONFIG_CLOCK_PLL_P

#define CONFIG_CLOCK_PLL_P   (2)

Definition at line 50 of file cfg_clock_default_120.h.

CONFIG_CLOCK_PLL_Q

#define CONFIG_CLOCK_PLL_Q   (5)

Definition at line 53 of file cfg_clock_default_120.h.