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compat_layer.h
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1/*
2 * SPDX-FileCopyrightText: 2025 Tom Hert <git@annsann.eu>
3 * SPDX-FileCopyrightText: 2025 HAW Hamburg
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
18
19#include "periph_cpu.h"
20#include <stdint.h>
21
22#ifdef RP2350_USE_RISCV
23# include "xh3irq.h"
25# define __h3_block() __asm__("slt x0, x0, x0")
27# define __h3_unblock() __asm__("slt x0, x0, x1")
28#else
30 extern uint32_t _isr_vectors;
31#endif
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
41static inline void rp_irq_enable(uint32_t irq_no)
42{
43#ifdef RP2350_USE_RISCV
44 xh3irq_enable_irq(irq_no);
45#else
46 NVIC_EnableIRQ(irq_no);
47#endif
48}
49
54static inline void rp_irq_disable(uint32_t irq_no)
55{
56#ifdef RP2350_USE_RISCV
57 xh3irq_disable_irq(irq_no);
58#else
59 NVIC_DisableIRQ(irq_no);
60#endif
61}
62
66static inline void rp_end_isr(void)
67{
68#ifdef RP2350_USE_ARM
70#endif
71}
72
76static inline void rp_arch_init(void)
77{
78#ifdef RP2350_USE_RISCV
79 riscv_init();
80#else
82#endif
83}
84
88static inline void rp_block_core(void)
89{
90#ifdef RP2350_USE_RISCV
91 __h3_block();
92#else
93 __WFI();
94#endif
95}
96
100static inline void rp_unblock_core(void)
101{
102#ifdef RP2350_USE_RISCV
103 __h3_unblock();
104#else
105 __SEV();
106#endif
107}
108
113static inline uint32_t* rp_get_vector_poiner(void)
114{
115#ifdef RP2350_USE_RISCV
116 return (uint32_t*)vector_cpu;
117#else
118 return &_isr_vectors;
119#endif
120}
121
122#ifdef __cplusplus
123}
124#endif
125
static void rp_arch_init(void)
Initialize the architecture-specific components.
static void rp_end_isr(void)
Called upon the end of an ISR.
uint32_t _isr_vectors
Defined in the linker script.
static void rp_block_core(void)
Wait For Interrupt abstraction.
static void rp_irq_disable(uint32_t irq_no)
Disable the given IRQ.
static uint32_t * rp_get_vector_poiner(void)
Get a pointer to the CPU specific interrupt vector table.
static void rp_irq_enable(uint32_t irq_no)
Enable the given IRQ.
static void rp_unblock_core(void)
Set Event abstraction.
static void cortexm_isr_end(void)
Trigger a conditional context scheduler run / context switch.
Definition cpu.h:176
void cortexm_init(void)
Initialize Cortex-M specific core parts of the CPU.
void riscv_init(void)
Initialize rv32i specific core parts of the CPU.
Peripheral CPU definitions for the RP2350.
xh3irq.h interrupt controller support
void xh3irq_enable_irq(uint32_t irq_no)
Enable the given IRQ number.
void xh3irq_disable_irq(uint32_t irq_no)
Disable the given IRQ number.
const void * vector_cpu[CPU_IRQ_NUMOF]
CPU specific interrupt vector table.