cfg_clock_default.h

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/*
 * SPDX-FileCopyrightText: 2024 Prime Controls, Inc.(R)
 * SPDX-FileCopyrightText: 2025 Technische Universität Hamburg
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#ifdef __cplusplus
extern "C" {
#endif
 
#include "cpu_conf.h"
#include "kernel_defines.h"
#include "modules.h"
#include "macros/units.h"
#include "lse.h"
#include "lsi.h"
 
/* ==========================
 *  DEFAULT CONFIGURATION - HSI PLL
 * ========================== */

#ifndef CONFIG_USE_HSI_DIRECT
#  define CONFIG_USE_HSI_DIRECT      0
#endif

#ifndef CONFIG_USE_HSI_PLL
#  if IS_ACTIVE(CONFIG_USE_HSI_DIRECT) || IS_ACTIVE(CONFIG_USE_HSE_DIRECT) || \
      IS_ACTIVE(CONFIG_USE_CSI_DIRECT) || IS_ACTIVE(CONFIG_USE_CSI_PLL) || \
      IS_ACTIVE(CONFIG_USE_HSE_PLL)
#    define CONFIG_USE_HSI_PLL       0
#  else
#    define CONFIG_USE_HSI_PLL       1
#endif
#endif

#ifndef CONFIG_CLOCK_HSI_DIV
#  define CONFIG_CLOCK_HSI_DIV       1
#endif

#ifndef CONFIG_USE_HSE_PLL
#  define CONFIG_USE_HSE_PLL         0
#endif

#ifndef CONFIG_USE_HSE_DIRECT
#  define CONFIG_USE_HSE_DIRECT      0
#endif

#ifndef CONFIG_USE_CSI_PLL
#  define CONFIG_USE_CSI_PLL         0
#endif

#ifndef CONFIG_USE_CSI_DIRECT
#  define CONFIG_USE_CSI_DIRECT      0
#endif
 
/* ==========================
 *  Base oscillator defaults
 * ========================== */
#if IS_ACTIVE(CONFIG_USE_HSI_DIRECT) || IS_ACTIVE(CONFIG_USE_HSI_PLL)
#  ifndef CONFIG_CLOCK_HSI
#    define CONFIG_CLOCK_HSI         64
#  endif
#endif
 
#if IS_ACTIVE(CONFIG_USE_HSE_PLL) || IS_ACTIVE(CONFIG_USE_HSE_DIRECT)
#  ifndef CONFIG_CLOCK_HSE
#    define CONFIG_CLOCK_HSE         8
#  endif
#endif
 
#if IS_ACTIVE(CONFIG_USE_CSI_DIRECT) || IS_ACTIVE(CONFIG_USE_CSI_PLL)
#  ifndef CONFIG_CLOCK_CSI
#    define CONFIG_CLOCK_CSI         4
#  endif
#endif
 
#ifndef CONFIG_CLOCK_LSE
#  define CONFIG_CLOCK_LSE           32768UL
#endif
 
#if IS_ACTIVE(CONFIG_USE_LSI)
#  ifndef CONFIG_CLOCK_LSI
#    define CONFIG_CLOCK_LSI         32000UL
#  endif
#endif

#ifndef CONFIG_CLOCK_CORECLOCK_DIV
#  define CONFIG_CLOCK_CORECLOCK_DIV     1
#endif
 
#if IS_ACTIVE(CONFIG_USE_HSI_PLL) || IS_ACTIVE(CONFIG_USE_HSE_PLL) || \
    IS_ACTIVE(CONFIG_USE_CSI_PLL)
/* --------------------------------------------------------------------------
 * MODE: PLL-based (default)
 * --------------------------------------------------------------------------
 * SYSCLK source = PLL1_P output
 * Target SYSCLK = 480 MHz
 * -------------------------------------------------------------------------- */
 
/* Default PLL1 configuration based on input clock. */
#  if (CONFIG_CLOCK_HSE == 8)
    /* HSE with PLL1 → 480 MHz (VCO=960 MHz) */
#    ifndef CONFIG_CLOCK_PLL1_M
#      define CONFIG_CLOCK_PLL1_M        4
#      define CONFIG_CLOCK_PLL1_N        480
#      define CONFIG_CLOCK_PLL1_P        2
#      define CONFIG_CLOCK_PLL1_Q        20
#      define CONFIG_CLOCK_PLL1_R        2
#    endif
 
#  elif (CONFIG_CLOCK_HSE == 25)
    /* HSE with PLL1 → 480 MHz (VCO=960 MHz) */
#    ifndef CONFIG_CLOCK_PLL1_M
#      define CONFIG_CLOCK_PLL1_M        5
#      define CONFIG_CLOCK_PLL1_N        192
#      define CONFIG_CLOCK_PLL1_P        2
#      define CONFIG_CLOCK_PLL1_Q        20
#      define CONFIG_CLOCK_PLL1_R        2
#    endif
 
#  elif (CONFIG_CLOCK_CSI == 4)
    /* CSI with PLL1 → 480 MHz (VCO=960 MHz) */
#    ifndef CONFIG_CLOCK_PLL1_M
#      define CONFIG_CLOCK_PLL1_M        1
#      define CONFIG_CLOCK_PLL1_N        240
#      define CONFIG_CLOCK_PLL1_P        2
#      define CONFIG_CLOCK_PLL1_Q        20
#      define CONFIG_CLOCK_PLL1_R        2
#    endif
 
#  elif (CONFIG_CLOCK_HSI == 64)
    /* HSI with PLL1 → 480 MHz (VCO=960 MHz) */
#    ifndef CONFIG_CLOCK_PLL1_M
#      define CONFIG_CLOCK_PLL1_M        8
#      define CONFIG_CLOCK_PLL1_N        120
#      define CONFIG_CLOCK_PLL1_P        2
#      define CONFIG_CLOCK_PLL1_Q        20
#      define CONFIG_CLOCK_PLL1_R        2
#   endif
 
#  else
#    error "Unsupported clock input for PLL configuration."
#  endif
#endif /* CONFIG_USE_HSI_DIRECT */
 
#include "clk/h7/lse.h"
#include "clk/h7/lsi.h"
#include "clk/h7/hse.h"
#include "clk/h7/hsi.h"
#include "clk/h7/csi.h"
#include "clk/h7/pll1.h"
#include "clk/h7/pll2.h"
#include "clk/h7/pll3.h"
#include "clk/h7/coreclock.h"

#ifndef CONFIG_CLOCK_AHB_DIV
#  define CONFIG_CLOCK_AHB_DIV       2
#endif
 
#include "clk/h7/ahb.h"

#ifndef CONFIG_CLOCK_APB1_DIV
#  define CONFIG_CLOCK_APB1_DIV      2
#endif

#ifndef CONFIG_CLOCK_APB2_DIV
#  define CONFIG_CLOCK_APB2_DIV      2
#endif

#ifndef CONFIG_CLOCK_APB3_DIV
#  define CONFIG_CLOCK_APB3_DIV      2
#endif

#ifndef CONFIG_CLOCK_APB4_DIV
#  define CONFIG_CLOCK_APB4_DIV      2
#endif
 
#include "clk/h7/apb1.h"
#include "clk/h7/apb2.h"
#include "clk/h7/apb3.h"
#include "clk/h7/apb4.h"
 
#ifdef __cplusplus
}
#endif