Main header for STM32H7 clock configuration (STM32H753ZI) More...

Detailed Description

Main header for STM32H7 clock configuration (STM32H753ZI)

Note

This configuration supports:

HSE (8 MHz or 25 MHz) + PLL1 → 480 MHz
HSI (64 MHz) + PLL1 → 480 MHz
HSI direct (no PLL) with optional divider (/1, /2, /4, /8)
CSI (4 MHz) + PLL1 → 480 MHz

Author: Joshua DeWeese jdewe.nosp@m.ese@.nosp@m.prime.nosp@m.cont.nosp@m.rols..nosp@m.com; Jay R Vaghela jay.v.nosp@m.aghe.nosp@m.la@tu.nosp@m.hh.d.nosp@m.e

#include "cpu_conf.h"
#include "kernel_defines.h"
#include "modules.h"
#include "macros/units.h"
#include "lse.h"
#include "lsi.h"
#include "clk/h7/hse.h"
#include "clk/h7/hsi.h"
#include "clk/h7/csi.h"
#include "clk/h7/pll1.h"
#include "clk/h7/pll2.h"
#include "clk/h7/pll3.h"
#include "clk/h7/coreclock.h"
#include "clk/h7/ahb.h"
#include "clk/h7/apb1.h"
#include "clk/h7/apb2.h"
#include "clk/h7/apb3.h"
#include "clk/h7/apb4.h"

Include dependency graph for cfg_clock_default.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

#define	CONFIG_USE_HSI_DIRECT 0
	Enable direct HSI clock usage (no PLL)

#define	CONFIG_USE_HSI_PLL 1
	Default to HSI + PLL as clock.

#define	CONFIG_CLOCK_HSI_DIV 1
	HSI divider when using HSI direct (no PLL) Valid values: 1, 2, 4, 8.

#define	CONFIG_USE_HSE_PLL 0
	Disable HSE + PLL usage by default.

#define	CONFIG_USE_HSE_DIRECT 0
	Disable HSE usage by default.

#define	CONFIG_USE_CSI_PLL 0
	Disable CSI usage by default.

#define	CONFIG_USE_CSI_DIRECT 0
	Disable CSI direct usage by default.

#define	CONFIG_CLOCK_CORECLOCK_DIV 1
	Core clock divider.

#define	CONFIG_CLOCK_AHB_DIV 2
	Default AHB clock divider.

#define	CONFIG_CLOCK_APB1_DIV 2
	APB1 clock divider.

#define	CONFIG_CLOCK_APB2_DIV 2
	APB2 clock divider.

#define	CONFIG_CLOCK_APB3_DIV 2
	APB3 clock divider.

#define	CONFIG_CLOCK_APB4_DIV 2
	APB4 clock divider.

Macro Definition Documentation

◆ CONFIG_CLOCK_AHB_DIV

#define CONFIG_CLOCK_AHB_DIV 2

Default AHB clock divider.

Note: HCLK = SYSCLK / CONFIG_CLOCK_AHB_DIV, max 240 MHz

Definition at line 210 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB1_DIV

#define CONFIG_CLOCK_APB1_DIV 2

APB1 clock divider.

Note: PCLK1 = HCLK / CONFIG_CLOCK_APB1_DIV (max 120 MHz)

Definition at line 220 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB2_DIV

#define CONFIG_CLOCK_APB2_DIV 2

APB2 clock divider.

Note: PCLK2 = HCLK / CONFIG_CLOCK_APB2_DIV (max 120 MHz)

Definition at line 228 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB3_DIV

#define CONFIG_CLOCK_APB3_DIV 2

APB3 clock divider.

Note: PCLK3 = HCLK / CONFIG_CLOCK_APB3_DIV (max 120 MHz)

Definition at line 236 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB4_DIV

#define CONFIG_CLOCK_APB4_DIV 2

APB4 clock divider.

Note: PCLK4 = HCLK / CONFIG_CLOCK_APB4_DIV (max 120 MHz)

Definition at line 244 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_CORECLOCK_DIV

#define CONFIG_CLOCK_CORECLOCK_DIV 1

Core clock divider.

Note: SYSCLK will be divided by this value to produce CLOCK_CORECLOCK

Default: 1

Definition at line 137 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_HSI_DIV

#define CONFIG_CLOCK_HSI_DIV 1

HSI divider when using HSI direct (no PLL) Valid values: 1, 2, 4, 8.

Definition at line 69 of file cfg_clock_default.h.

◆ CONFIG_USE_CSI_DIRECT

#define CONFIG_USE_CSI_DIRECT 0

Disable CSI direct usage by default.

Definition at line 97 of file cfg_clock_default.h.

◆ CONFIG_USE_CSI_PLL

#define CONFIG_USE_CSI_PLL 0

Disable CSI usage by default.

Definition at line 90 of file cfg_clock_default.h.

◆ CONFIG_USE_HSE_DIRECT

#define CONFIG_USE_HSE_DIRECT 0

Disable HSE usage by default.

Definition at line 83 of file cfg_clock_default.h.

◆ CONFIG_USE_HSE_PLL

#define CONFIG_USE_HSE_PLL 0

Disable HSE + PLL usage by default.

Definition at line 76 of file cfg_clock_default.h.

◆ CONFIG_USE_HSI_DIRECT

#define CONFIG_USE_HSI_DIRECT 0

Enable direct HSI clock usage (no PLL)

Note: Select system clock source: Use HSI direct (no PLL) = 1

Definition at line 48 of file cfg_clock_default.h.

◆ CONFIG_USE_HSI_PLL

#define CONFIG_USE_HSI_PLL 1

Default to HSI + PLL as clock.

Definition at line 60 of file cfg_clock_default.h.