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cfg_clock_default.h
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/*
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* SPDX-FileCopyrightText: 2026 Technische Universität Hamburg
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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#include "
cfg_clock_common_lx_u5_wx.h
"
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#include "
kernel_defines.h
"
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#include "
macros/units.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#ifndef CONFIG_USE_CLOCK_PLL
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# define CONFIG_USE_CLOCK_PLL 0
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#endif
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#ifndef CONFIG_USE_CLOCK_HSI
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# define CONFIG_USE_CLOCK_HSI 1
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#endif
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#ifndef CONFIG_CLOCK_HSI
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# define CONFIG_CLOCK_HSI MHZ(16)
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#endif
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#ifndef CONFIG_CLOCK_HSE
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# define CONFIG_CLOCK_HSE MHZ(8)
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#endif
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#ifndef CONFIG_CLOCK_MSI
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# define CONFIG_CLOCK_MSI MHZ(12)
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#endif
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE)
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# define CLOCK_CORECLOCK CONFIG_CLOCK_HSE
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#elif IS_ACTIVE(CONFIG_USE_CLOCK_MSI)
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# define CLOCK_CORECLOCK CONFIG_CLOCK_MSI
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#else
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# define CLOCK_CORECLOCK CONFIG_CLOCK_HSI
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#endif
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#define CLOCK_CORECLOCK_MAX MHZ(96)
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#if CLOCK_CORECLOCK > CLOCK_CORECLOCK_MAX
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# error "SYSCLK cannot exceed 96MHz on STM32U3"
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#endif
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#define CLOCK_AHB CLOCK_CORECLOCK
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#ifndef CONFIG_CLOCK_APB1_DIV
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# define CONFIG_CLOCK_APB1_DIV (1)
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#endif
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#ifndef CONFIG_CLOCK_APB2_DIV
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# define CONFIG_CLOCK_APB2_DIV (1)
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#endif
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#ifndef CONFIG_CLOCK_APB3_DIV
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# define CONFIG_CLOCK_APB3_DIV (1)
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#endif
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#define CLOCK_APB1 (CLOCK_AHB / CONFIG_CLOCK_APB1_DIV)
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#define CLOCK_APB2 (CLOCK_AHB / CONFIG_CLOCK_APB2_DIV)
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#define CLOCK_APB3 (CLOCK_AHB / CONFIG_CLOCK_APB3_DIV)
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#ifdef __cplusplus
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}
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#endif
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cfg_clock_common_lx_u5_wx.h
Base STM32Lx/U5/Wx clock configuration.
kernel_defines.h
Common macros and compiler attributes/pragmas configuration.
units.h
Unit helper macros.
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