Detailed Description

Macros
#define	RCOSC48M_FREQ 48000000
	48 MHz

#define	RCOSC24M_FREQ 24000000
	24 MHz

enum	IRQn { ResetHandler_IRQn = -15 , NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 , UsageFault_IRQn = -10 , SVCall_IRQn = - 5 , DebugMonitor_IRQn = - 4 , PendSV_IRQn = - 2 , SysTick_IRQn = - 1 , EDGE_DETECT_IRQN = 0 , I2C_IRQN = 1 , RF_CPE1_IRQN = 2 , PKA_IRQN = 3 , AON_RTC_IRQN = 4 , UART0_IRQN = 5 , AON_AUX_SWEV0_IRQN = 6 , SSI0_IRQN = 7 , SSI1_IRQN = 8 , RF_CPE0_IRQN = 9 , RF_HW_IRQN = 10 , RF_CMD_ACK_IRQN = 11 , I2S_IRQN = 12 , AON_AUX_SWEV1_IRQN = 13 , WATCHDOG_IRQN = 14 , GPTIMER_0A_IRQN = 15 , GPTIMER_0B_IRQN = 16 , GPTIMER_1A_IRQN = 17 , GPTIMER_1B_IRQN = 18 , GPTIMER_2A_IRQN = 19 , GPTIMER_2B_IRQN = 20 , GPTIMER_3A_IRQN = 21 , GPTIMER_3B_IRQN = 22 , CRYPTO_IRQN = 23 , UDMA_IRQN = 24 , UDMA_ERR_IRQN = 25 , FLASH_CTRL_IRQN = 26 , SW0_IRQN = 27 , AUX_COMBO_IRQN = 28 , AON_PRG0_IRQN = 29 , PROG_IRQN = 30 , AUX_COMPA_IRQN = 31 , AUX_ADC_IRQN = 32 , TRNG_IRQN = 33 , IRQN_COUNT = (TRNG_IRQN + 1) }
	Interrupt number definition. More...

typedef enum IRQn	IRQn_Type
	Interrupt number definition.

typedef volatile uint8_t	reg8_t
	Unsigned 8-bit register type.

typedef volatile uint16_t	reg16_t
	Unsigned 16-bit register type.

typedef volatile uint32_t	reg32_t
	Unsigned 32-bit register type.

typedef reg16_t	reg8_m8_t
	Masked 8-bit register.

#define	__MPU_PRESENT 1
	Configuration of the Cortex-M4 processor and core peripherals.

#define	__NVIC_PRIO_BITS 3
	CC13x2 offers priority levels from 0..7.

#define	__Vendor_SysTickConfig 0
	Set to 1 if different SysTick config is used.

Macro Definition Documentation

◆ __MPU_PRESENT

#define __MPU_PRESENT 1

Configuration of the Cortex-M4 processor and core peripherals.

CC13x2 does provide a MPU

Definition at line 131 of file cc26xx_cc13xx.h.

◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS 3

CC13x2 offers priority levels from 0..7.

Definition at line 132 of file cc26xx_cc13xx.h.

◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick config is used.

Definition at line 133 of file cc26xx_cc13xx.h.

◆ RCOSC24M_FREQ

#define RCOSC24M_FREQ 24000000

24 MHz

Definition at line 137 of file cc26xx_cc13xx.h.

◆ RCOSC48M_FREQ

#define RCOSC48M_FREQ 48000000

48 MHz

Definition at line 136 of file cc26xx_cc13xx.h.

Typedef Documentation

◆ reg16_t

typedef volatile uint16_t reg16_t

Unsigned 16-bit register type.

Definition at line 32 of file cc26xx_cc13xx.h.

◆ reg32_t

typedef volatile uint32_t reg32_t

Unsigned 32-bit register type.

Definition at line 36 of file cc26xx_cc13xx.h.

◆ reg8_m8_t

typedef reg16_t reg8_m8_t

Masked 8-bit register.

Definition at line 49 of file cc26xx_cc13xx.h.

◆ reg8_t

typedef volatile uint8_t reg8_t

Unsigned 8-bit register type.

Definition at line 28 of file cc26xx_cc13xx.h.

Enumeration Type Documentation

◆ IRQn

enum IRQn

Interrupt number definition.

Enumerator
ResetHandler_IRQn	1 Reset Handler
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 Cortex-M4 Hard Fault Interrupt
MemoryManagement_IRQn	4 Cortex-M4 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M4 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M4 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M4 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M4 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M4 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M4 System Tick Interrupt
EDGE_DETECT_IRQN	16 AON edge detect
I2C_IRQN	17 I2C
RF_CPE1_IRQN	18 RF Command and Packet Engine 1
PKA_IRQN	19 PKA interrupt
AON_RTC_IRQN	20 AON RTC
UART0_IRQN	21 UART0 Rx and Tx
AON_AUX_SWEV0_IRQN	22 Sensor Controller software event 0, through AON domain
SSI0_IRQN	23 SSI0 Rx and Tx
SSI1_IRQN	24 SSI1 Rx and Tx
RF_CPE0_IRQN	25 RF Command and Packet Engine 0
RF_HW_IRQN	26 RF Core Hardware
RF_CMD_ACK_IRQN	27 RF Core Command Acknowledge
I2S_IRQN	28 I2S
AON_AUX_SWEV1_IRQN	29 Sensor Controller software event 1, through AON domain
WATCHDOG_IRQN	30 Watchdog timer
GPTIMER_0A_IRQN	31 Timer 0 subtimer A
GPTIMER_0B_IRQN	32 Timer 0 subtimer B
GPTIMER_1A_IRQN	33 Timer 1 subtimer A
GPTIMER_1B_IRQN	34 Timer 1 subtimer B
GPTIMER_2A_IRQN	35 Timer 2 subtimer A
GPTIMER_2B_IRQN	36 Timer 2 subtimer B
GPTIMER_3A_IRQN	37 Timer 3 subtimer A
GPTIMER_3B_IRQN	38 Timer 3 subtimer B
CRYPTO_IRQN	39 Crypto Core Result available
UDMA_IRQN	40 uDMA Software
UDMA_ERR_IRQN	41 uDMA Error
FLASH_CTRL_IRQN	42 Flash controller
SW0_IRQN	43 Software Event 0
AUX_COMBO_IRQN	44 AUX combined event, directly to MCU domain
AON_PRG0_IRQN	45 AON programmable 0
PROG_IRQN	46 Dynamic Programmable interrupt (default source: PRCM)
AUX_COMPA_IRQN	47 AUX Comparator A
AUX_ADC_IRQN	48 AUX ADC IRQ
TRNG_IRQN	49 TRNG event
IRQN_COUNT	Number of peripheral IDs.

Definition at line 66 of file cc26xx_cc13xx.h.