16#ifndef LIS2DH12_REGISTERS_H
17#define LIS2DH12_REGISTERS_H
123#define LIS2DH12_INT_SRC_1(ret) (((uint32_t)(ret) >> 0) & 0x7F)
128#define LIS2DH12_INT_SRC_2(ret) (((uint32_t)(ret) >> 8) & 0x7F)
133#define LIS2DH12_INT_SRC_CLICK(ret) (((uint32_t)(ret) >> 16) & 0x7F)
208#define LIS2DH12_CTRL_REG2_HP_IA1 (1 << 0)
209#define LIS2DH12_CTRL_REG2_HP_IA2 (1 << 1)
210#define LIS2DH12_CTRL_REG2_HPCLICK (1 << 2)
211#define LIS2DH12_CTRL_REG2_FDS (1 << 3)
213#define LIS2DH12_CLICK_THS_LIR (0x80)
@ LIS2DH12_STATUS_REG_ZYXDA
On X-, Y-, Z-axis new data available.
@ LIS2DH12_STATUS_REG_YOR
Y-axis data overrun.
@ LIS2DH12_STATUS_REG_XOR
X-axis data overrun.
@ LIS2DH12_STATUS_REG_ZOR
Y-axis data overrun.
@ LIS2DH12_STATUS_REG_YDA
Y-axis new data available.
@ LIS2DH12_STATUS_REG_XDA
X-axis new data available.
@ LIS2DH12_STATUS_REG_ZDA
Z-axis new data available.
@ LIS2DH12_STATUS_REG_ZYXOR
On X-, Y-, Z-axis data overrun.
@ LIS2DH12_INT_CFG_ZHIE
enable Z high event
@ LIS2DH12_INT_CFG_YHIE
enable Y high event
@ LIS2DH12_INT_CFG_XLIE
enable X low event
@ LIS2DH12_INT_CFG_6D
enable 6-direction detection
@ LIS2DH12_INT_CFG_XHIE
enable X high event
@ LIS2DH12_INT_CFG_ZLIE
enable Z low event
@ LIS2DH12_INT_CFG_YLIE
enable Y low event
@ LIS2DH12_INT_CFG_AOI
and/or combination interrupt events
@ LIS2DH12_STATUS_REG_AUX_TOR
Temperature data overrun.
@ LIS2DH12_STATUS_REG_AUX_TDA
Temperature new data available.
@ LIS2DH12_INT_SRC_XL
X low event.
@ LIS2DH12_INT_SRC_XH
X high event.
@ LIS2DH12_INT_SRC_ZL
Z low event.
@ LIS2DH12_INT_SRC_ZH
Z high event.
@ LIS2DH12_INT_SRC_YL
Y low event.
@ LIS2DH12_INT_SRC_IA
Interrupt 1 active, at least one interrupt \ has been generated.
@ LIS2DH12_INT_SRC_YH
Y high event.
@ LIS2DH12_INT_TYPE_I1_WTM
FIFO watermark interrupt on INT1.
@ LIS2DH12_INT_TYPE_I1_ZYXDA
ZYXDA interrupt on INT1.
@ LIS2DH12_INT_TYPE_I2_IA2
IA2 on INT2.
@ LIS2DH12_INT_TYPE_I2_ACT
enable activity interrupt on INT2
@ LIS2DH12_INT_TYPE_I2_CLICK
click interrupt on INT2
@ LIS2DH12_INT_TYPE_CLICK
click interrupt
@ LIS2DH12_INT_TYPE_IA2
Event 2.
@ LIS2DH12_INT_TYPE_I2_IA1
IA1 on INT2.
@ LIS2DH12_INT_TYPE_I1_IA2
IA2 interrupt on INT1.
@ LIS2DH12_INT_TYPE_IA1
Event 1.
@ LIS2DH12_INT_TYPE_I2_BOOT
enable boot on INT2
@ LIS2DH12_INT_TYPE_I1_OVERRUN
FIFO overrun interrupt on INT1.
@ LIS2DH12_INT_TYPE_I1_IA1
IA1 interrupt on INT1.
@ LIS2DH12_INT_TYPE_INT_POLARITY
INT1 and INT2 pin polarity.
@ LIS2DH12_INT_TYPE_I1_CLICK
click interrupt on INT1
@ LIS2DH12_EVENT_2
second event slot
@ LIS2DH12_EVENT_1
first event slot
@ LIS2DH12_EVENT_CLICK
click event
@ LIS2DH12_TEMP_CFG_REG_DISABLE
Temperature sensor disable.
@ LIS2DH12_TEMP_CFG_REG_ENABLE
Temperature sensor enable
ACT_DURATION definitions.
uint8_t reg
Sleep-to-wake and return-to-sleep duration, in ODR cycles.
uint8_t ACTH
Sets the threshold sleep-to-wake or return-to-sleep LSB according to LIS2DH12_SCALE.
uint8_t _RESERVED
reserved bit
uint8_t reg
Type used for register access.
uint8_t _RESERVED
Reserved bits.
uint8_t XD
Interrupt double-click enable on X-axis.
uint8_t ZS
Interrupt single-click enable on Z-axis.
uint8_t reg
Type used for register access.
uint8_t YD
Interrupt double-click enable on Y-axis.
uint8_t YS
Interrupt single-click enable on Y-axis.
uint8_t ZD
Interrupt double-click enable on Z-axis.
uint8_t XS
Interrupt single-click enable on X-axis.
uint8_t SClick
Single click detected.
uint8_t _RESERVED
Reserved bit.
uint8_t X_AXIS
X click detected.
uint8_t Z_AXIS
Z click detected.
uint8_t Y_AXIS
Y click detected.
uint8_t DClick
Double click detected.
uint8_t reg
Type used for register access.
uint8_t IA
Interrupt active, at least one interrupt \ has been generated.
uint8_t Sign
Click sign, "0" positive, "1" negative.
uint8_t reg
Type used for register access.
uint8_t LIR_CLICK
Enables latency on interrupt kept high, \ "0" for duration of latency window, \ "1" kept high until C...
uint8_t THS
Sets the click threshold, LSB according to LIS2DH12_SCALE.
uint8_t CTRL0_DEFAULT_VALUE
Always set this to CTRL_REG0_DEFAULT.
uint8_t reg
Type used for register access.
uint8_t SDO_PU_DISC
disconnect pull-up on SDO/SA0
uint8_t Xen
X axis enable.
uint8_t reg
Type used for register access.
uint8_t ODR
Set Data rate.
uint8_t Zen
Z axis enable.
uint8_t Yen
Y axis enable.
uint8_t LPen
Enable Low Power mode.
uint8_t HPCLICK
High pass filter enable for CLICK function.
uint8_t HP_IA2
High pass filter enable for AOI on interrupt 2.
uint8_t HPCF
High pass filter cutoff frequency.
uint8_t HPM
High pass filter mode selection.
uint8_t reg
Type used for register access.
uint8_t HP_IA1
High pass filter enable for AOI on interrupt 1.
uint8_t FDS
Enables filter output data.
uint8_t I1_IA2
Enable IA2 interrupt on INT1.
uint8_t I1_OVERRUN
Enable FIFO overrun interrupt on INT1.
uint8_t _RESERVED3
Should always be "0".
uint8_t I1_CLICK
Enable CLICK interrupt on INT1.
uint8_t _RESERVED0
Reserved bit.
uint8_t I1_WTM
Enable FIFO watermark interrupt on INT1.
uint8_t I1_IA1
Enable IA1 interrupt on INT1.
uint8_t reg
Type used for register access.
uint8_t I1_ZYXDA
Enable ZYXDA interrupt on INT1.
uint8_t ST
Self-test enable.
uint8_t BDU
Block data update.
uint8_t BLE
Big/Little endian data selection.
uint8_t FS
Full-scale selection.
uint8_t reg
Type used for register access.
uint8_t SPIM
SPI serial interface mode selection (SIM)
uint8_t HR
Operating mode.
uint8_t D4D_INT2
4D detection enabled on INT2
uint8_t reg
Type used for register access.
uint8_t LIR_INT2
Latch interrupt request for INT2.
uint8_t D4D_INT1
4D detection enabled on INT1
uint8_t FIFO_EN
FIFO enable.
uint8_t _RESERVED
Reserved bits.
uint8_t LIR_INT1
Latch interrupt request for INT2.
uint8_t BOOT
Clears the data content.
uint8_t I2_IA1
Enable IA1 on INT2.
uint8_t I2_ACT
Enable activity interrupt on INT2.
uint8_t INT_POLARITY
Set pin polarity for INT1 and INT2.
uint8_t _RESERVED2
Reserved bit.
uint8_t _RESERVED0
Reserved bit.
uint8_t I2_IA2
Enable IA2 on INT2.
uint8_t reg
Type used for register access.
uint8_t I2_BOOT
Enable boot on INT2.
uint8_t I2_CLICK
Enable CLICK interrupt on INT2.
FIFO_CTRL_REG definitions.
uint8_t FTH
Set the watermark level for FIFO.
uint8_t TR
Trigging selection, FIFO event triggers INT1 or INT2.
uint8_t reg
Type used for register access.
uint8_t FM
FIFO mode selection.
FIFO_SRC_REG definitions.
uint8_t reg
Type used for register access.
uint8_t EMPTY
FIFO is empty.
uint8_t FSS
Number of unread samples in FIFO.
uint8_t WTM
FIFO content watermark level.
uint8_t OVRN_FIFO
Overrun in FIFO occurred.
uint8_t YLIE
Enable interrupt on Y low event.
uint8_t ZLIE
Enable interrupt on Z low event.
uint8_t AOI
AND/OR combination of interrupt events.
uint8_t ZHIE
Enable interrupt on Z high event.
uint8_t D6D
6 direction detection function enable
uint8_t reg
Type used for register access.
uint8_t YHIE
Enable interrupt on Y high event.
uint8_t XHIE
Enable interrupt on X high event.
uint8_t XLIE
Enable interrupt on X low event.
INT1_DURATION definitions.
uint8_t _RESERVED
need to be zero
uint8_t reg
Type used for register access.
uint8_t D
Sets the minimum duration of INT1, in ODR cycles.
uint8_t reg
Type used for register access.
uint8_t THS
Sets threshold level, the LSB changes according to LIS2DH12_SCALE (@2G LSB=16mg; @4G LSB=32mg; @8G LS...
uint8_t _RESERVED
needs to be zero
uint8_t XLIE
Enable interrupt on X low event.
uint8_t reg
Type used for register access.
uint8_t YHIE
Enable interrupt on Y high event.
uint8_t YLIE
Enable interrupt on Y low event.
uint8_t AOI
AND/OR combination of interrupt events.
uint8_t ZLIE
Enable interrupt on Z low event.
uint8_t D6D
6 direction detection function enable
uint8_t XHIE
Enable interrupt on X high event.
uint8_t ZHIE
Enable interrupt on Z high event.
INT2_DURATION definitions.
uint8_t D
Sets the minimum duration of INT2, in ODR cycles.
uint8_t _RESERVED
need to be zero
uint8_t reg
Type used for register access.
uint8_t reg
Type used for register access.
uint8_t _RESERVED
needs to be zero
uint8_t THS
Sets threshold level, LSB according to LIS2DH12_SCALE.
uint8_t reg
Set reference value.
TEMP_CFG_REG definitions.
uint8_t _RESERVED
Should always be zero.
uint8_t TEMP_EN
"00" disables Temperature sensor, "11" enables
uint8_t reg
Type used for register access.
TIME_LATENCY definitions.
uint8_t reg
Sets time latency, in ODR cycles.
uint8_t reg
Type used for register access.
uint8_t _RESERVED
reserved bit
uint8_t TLI
Click time limit, in ODR cycles.
uint8_t reg
Sets time window, in ODR cycles.