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mrf24j40_registers.h
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1/*
2 * SPDX-FileCopyrightText: 2017 Neo Nenaco <neo@nenaco.de>
3 * SPDX-FileCopyrightText: 2017 Koen Zandberg <koen@bergzand.net>
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
28#define MRF24J40_SHORT_ADDR_TRANS (0x00)
29#define MRF24J40_LONG_ADDR_TRANS (0x80)
30#define MRF24J40_ACCESS_READ (0x00)
31#define MRF24J40_ACCESS_WRITE (0x01)
32#define MRF24J40_ACCESS_WRITE_LNG (0x10)
33#define MRF24J40_ADDR_OFFSET (0x01)
35
40#define MRF24J40_TX_NORMAL_FIFO (0x000)
41#define MRF24J40_TX_BEACON_FIFO (0x080)
42#define MRF24J40_TX_GTS1_FIFO (0x100)
43#define MRF24J40_TX_GTS2_FIFO (0x180)
44#define MRF24J40_RX_FIFO (0x300)
46
51#define MRF24J40_REG_RXMCR (0x00)
52#define MRF24J40_REG_PANIDL (0x01)
53#define MRF24J40_REG_PANIDH (0x02)
54#define MRF24J40_REG_SADRL (0x03)
55#define MRF24J40_REG_SADRH (0x04)
56#define MRF24J40_REG_EADR0 (0x05)
57#define MRF24J40_REG_EADR1 (0x06)
58#define MRF24J40_REG_EADR2 (0x07)
59#define MRF24J40_REG_EADR3 (0x08)
60#define MRF24J40_REG_EADR4 (0x09)
61#define MRF24J40_REG_EADR5 (0x0A)
62#define MRF24J40_REG_EADR6 (0x0B)
63#define MRF24J40_REG_EADR7 (0x0C)
64#define MRF24J40_REG_RXFLUSH (0x0D)
65#define MRF24J40_REG_ORDER (0x10)
66#define MRF24J40_REG_TXMCR (0x11)
67#define MRF24J40_REG_ACKTMOUT (0x12)
68#define MRF24J40_REG_ESLOTG1 (0x13)
69#define MRF24J40_REG_SYMTICKL (0x14)
70#define MRF24J40_REG_SYMTICKH (0x15)
71#define MRF24J40_REG_PACON0 (0x16)
72#define MRF24J40_REG_PACON1 (0x17)
73#define MRF24J40_REG_PACON2 (0x18)
74#define MRF24J40_REG_TXBCON0 (0x1A)
75#define MRF24J40_REG_TXNCON (0x1B)
76#define MRF24J40_REG_TXG1CON (0x1C)
77#define MRF24J40_REG_TXG2CON (0x1D)
78#define MRF24J40_REG_ESLOTG23 (0x1E)
79#define MRF24J40_REG_ESLOTG45 (0x1F)
80#define MRF24J40_REG_ESLOTG67 (0x20)
81#define MRF24J40_REG_TXPEND (0x21)
82#define MRF24J40_REG_WAKECON (0x22)
83#define MRF24J40_REG_FRMOFFSET (0x23)
84#define MRF24J40_REG_TXSTAT (0x24)
85#define MRF24J40_REG_TXBCON1 (0x25)
86#define MRF24J40_REG_GATECLK (0x26)
87#define MRF24J40_REG_TXTIME (0x27)
88#define MRF24J40_REG_HSYMTMRL (0x28)
89#define MRF24J40_REG_HSYMTMRH (0x29)
90#define MRF24J40_REG_SOFTRST (0x2A)
91#define MRF24J40_REG_SECCON0 (0x2C)
92#define MRF24J40_REG_SECCON1 (0x2D)
93#define MRF24J40_REG_TXSTBL (0x2E)
94#define MRF24J40_REG_RXSR (0x30)
95#define MRF24J40_REG_INTSTAT (0x31)
96#define MRF24J40_REG_INTCON (0x32)
97#define MRF24J40_REG_GPIO (0x33)
98#define MRF24J40_REG_TRISGPIO (0x34)
99#define MRF24J40_REG_SLPACK (0x35)
100#define MRF24J40_REG_RFCTL (0x36)
101#define MRF24J40_REG_SECCR2 (0x37)
102#define MRF24J40_REG_BBREG0 (0x38)
103#define MRF24J40_REG_BBREG1 (0x39)
104#define MRF24J40_REG_BBREG2 (0x3A)
105#define MRF24J40_REG_BBREG3 (0x3B)
106#define MRF24J40_REG_BBREG4 (0x3C)
107#define MRF24J40_REG_BBREG6 (0x3E)
108#define MRF24J40_REG_CCAEDTH (0x3F)
110
115#define MRF24J40_REG_RFCON0 (0x200)
116#define MRF24J40_REG_RFCON1 (0x201)
117#define MRF24J40_REG_RFCON2 (0x202)
118#define MRF24J40_REG_RFCON3 (0x203)
119#define MRF24J40_REG_RFCON5 (0x205)
120#define MRF24J40_REG_RFCON6 (0x206)
121#define MRF24J40_REG_RFCON7 (0x207)
122#define MRF24J40_REG_RFCON8 (0x208)
123#define MRF24J40_REG_SLPCAL0 (0x209)
124#define MRF24J40_REG_SLPCAL1 (0x20A)
125#define MRF24J40_REG_SLPCAL2 (0x20B)
126#define MRF24J40_REG_RFSTATE (0x20F)
127#define MRF24J40_REG_RSSI (0x210)
128#define MRF24J40_REG_SLPCON0 (0x211)
129#define MRF24J40_REG_SLPCON1 (0x220)
130#define MRF24J40_REG_WAKETIMEL (0x222)
131#define MRF24J40_REG_WAKETIMEH (0x223)
132#define MRF24J40_REG_REMCNTL (0x224)
133#define MRF24J40_REG_REMCNTH (0x225)
134#define MRF24J40_REG_MAINCNT0 (0x226)
135#define MRF24J40_REG_MAINCNT1 (0x227)
136#define MRF24J40_REG_MAINCNT2 (0x228)
137#define MRF24J40_REG_MAINCNT3 (0x229)
138#define MRF24J40_REG_TESTMODE (0x22F)
139#define MRF24J40_REG_ASSOEADR0 (0x230)
140#define MRF24J40_REG_ASSOEADR1 (0x231)
141#define MRF24J40_REG_ASSOEADR2 (0x232)
142#define MRF24J40_REG_ASSOEADR3 (0x233)
143#define MRF24J40_REG_ASSOEADR4 (0x234)
144#define MRF24J40_REG_ASSOEADR5 (0x235)
145#define MRF24J40_REG_ASSOEADR6 (0x236)
146#define MRF24J40_REG_ASSOEADR7 (0x237)
147#define MRF24J40_REG_ASSOSADR0 (0x238)
148#define MRF24J40_REG_ASSOSADR1 (0x239)
149#define MRF24J40_REG_UPNONCE0 (0x240)
150#define MRF24J40_REG_UPNONCE1 (0x241)
151#define MRF24J40_REG_UPNONCE2 (0x242)
152#define MRF24J40_REG_UPNONCE3 (0x243)
153#define MRF24J40_REG_UPNONCE4 (0x244)
154#define MRF24J40_REG_UPNONCE5 (0x245)
155#define MRF24J40_REG_UPNONCE6 (0x246)
156#define MRF24J40_REG_UPNONCE7 (0x247)
157#define MRF24J40_REG_UPNONCE8 (0x248)
158#define MRF24J40_REG_UPNONCE9 (0x249)
159#define MRF24J40_REG_UPNONCE10 (0x24A)
160#define MRF24J40_REG_UPNONCE11 (0x24B)
161#define MRF24J40_REG_UPNONCE12 (0x24C)
163
168#define MRF24J40_RESET_DELAY (2000U) /* Datasheet MRF24J40 ~2ms */
169#define MRF24J40_RESET_PULSE_WIDTH (20000U) /* 20ms (estimated */
170
171#define MRF24J40_WAKEUP_DELAY (2000U)
173#define MRF24J40_DELAY_SLEEP_TOGGLE (50U)
174#define MRF24J40_STATE_RESET_DELAY (200U)
176
181#define MRF24J40_RXMCR_NOACKRSP (0x20)
182#define MRF24J40_RXMCR_PANCOORD (0x08)
183#define MRF24J40_RXMCR_COORD (0x04)
184#define MRF24J40_RXMCR_ERRPKT (0x02)
185#define MRF24J40_RXMCR_PROMI (0x01)
187
192#define MRF24J40_RXFLUSH_WAKEPOL (0x40)
193#define MRF24J40_RXFLUSH_WAKEPAD (0x20)
194#define MRF24J40_RXFLUSH_CMDONLY (0x08)
195#define MRF24J40_RXFLUSH_DATAONLY (0x04)
196#define MRF24J40_RXFLUSH_BCNONLY (0x02)
197#define MRF24J40_RXFLUSH_RXFLUSH (0x01)
199
204#define MRF24J40_TXMCR_CSMA_BACKOFF_MASK (0x07)
205
206#define MRF24J40_TXMCR_MACMINBE (0x18)
207#define MRF24J40_TXMCR_NOCSMA (0x80)
208#define MRF24J40_TXMCR_BATLIFEXT (0x40)
209#define MRF24J40_TXMCR_SLOTTED (0x20)
210#define MRF24J40_TXMCR_MACMINBE1 (0x10)
211#define MRF24J40_TXMCR_MACMINBE0 (0x08)
212#define MRF24J40_TXMCR_CSMABF2 (0x04)
213#define MRF24J40_TXMCR_CSMABF1 (0x02)
214#define MRF24J40_TXMCR_CSMABF0 (0x01)
215
217
222#define MRF24J40_TXMCR_MACMINBE_SHIFT (3U)
224
229#define MRF24J40_ACKTMOUT_DRPACK (0x80)
230#define MRF24J40_ACKTMOUT_MAWD6 (0x40)
231#define MRF24J40_ACKTMOUT_MAWD5 (0x20)
232#define MRF24J40_ACKTMOUT_MAWD4 (0x10)
233#define MRF24J40_ACKTMOUT_MAWD3 (0x08)
234#define MRF24J40_ACKTMOUT_MAWD2 (0x04)
235#define MRF24J40_ACKTMOUT_MAWD1 (0x02)
236#define MRF24J40_ACKTMOUT_MAWD0 (0x01)
237
239
244#define MRF24J40_PACON2_FIFOEN (0x80)
245#define MRF24J40_PACON2_TXONTS3 (0x20)
246#define MRF24J40_PACON2_TXONTS2 (0x10)
247#define MRF24J40_PACON2_TXONTS1 (0x08)
248#define MRF24J40_PACON2_TXONTS0 (0x04)
249#define MRF24J40_PACON2_TXONT8 (0x02)
250#define MRF24J40_PACON2_TXONT7 (0x01)
252
257#define MRF24J40_TXNCON_FPSTAT (0x10)
258#define MRF24J40_TXNCON_INDIRECT (0x08)
259#define MRF24J40_TXNCON_TXNACKREQ (0x04)
260#define MRF24J40_TXNCON_TXNSECEN (0x02)
261#define MRF24J40_TXNCON_TXNTRIG (0x01)
263
268#define MRF24J40_WAKECON_IMMWAKE (0x80)
269#define MRF24J40_WAKECON_REGWAKE (0x40)
271
276#define MRF24J40_TXSTAT_MAX_FRAME_RETRIES (0xC0)
277#define MRF24J40_TXSTAT_TXNRETRY1 (0x80)
278#define MRF24J40_TXSTAT_TXNRETRY0 (0x40)
279#define MRF24J40_TXSTAT_CCAFAIL (0x20)
280#define MRF24J40_TXSTAT_TXG2FNT (0x10)
281#define MRF24J40_TXSTAT_TXG1FNT (0x08)
282#define MRF24J40_TXSTAT_TXG2STAT (0x04)
283#define MRF24J40_TXSTAT_TXG1STAT (0x02)
284#define MRF24J40_TXSTAT_TXNSTAT (0x01)
286
291#define MRF24J40_TXSTAT_MAX_FRAME_RETRIES_SHIFT (6U)
292#define MRF24J40_TXSTAT_CCAFAIL_SHIFT (5U)
294
299#define MRF24J40_SOFTRST_RSTPWR (0x04)
300#define MRF24J40_SOFTRST_RSTBB (0x02)
301#define MRF24J40_SOFTRST_RSTMAC (0x01)
303
308#define MRF24J40_TXSTBL_RFSTBL3 (0x80)
309#define MRF24J40_TXSTBL_RFSTBL2 (0x40)
310#define MRF24J40_TXSTBL_RFSTBL1 (0x20)
311#define MRF24J40_TXSTBL_RFSTBL0 (0x10)
312#define MRF24J40_TXSTBL_MSIFS3 (0x08)
313#define MRF24J40_TXSTBL_MSIFS2 (0x04)
314#define MRF24J40_TXSTBL_MSIFS1 (0x02)
315#define MRF24J40_TXSTBL_MSIFS0 (0x01)
317
322#define MRF24J40_INTSTAT_SLPIF (0x80)
323#define MRF24J40_INTSTAT_WAKEIF (0x40)
324#define MRF24J40_INTSTAT_HSYMTMRIF (0x20)
325#define MRF24J40_INTSTAT_SECIF (0x10)
326#define MRF24J40_INTSTAT_RXIF (0x08)
327#define MRF24J40_INTSTAT_TXG2IF (0x04)
328#define MRF24J40_INTSTAT_TXG1IF (0x02)
329#define MRF24J40_INTSTAT_TXNIF (0x01)
331
336#define MRF24J40_INTCON_SLPIE (0x80)
337#define MRF24J40_INTCON_WAKEIE (0x40)
338#define MRF24J40_INTCON_HSYMTMRIE (0x20)
339#define MRF24J40_INTCON_SECIE (0x10)
340#define MRF24J40_INTCON_RXIE (0x08)
341#define MRF24J40_INTCON_TXG2IE (0x04)
342#define MRF24J40_INTCON_TXG1IE (0x02)
343#define MRF24J40_INTCON_TXNIE (0x01)
345
350#define MRF24J40_GPIO_0 (0x01)
351#define MRF24J40_GPIO_1 (0x02)
352#define MRF24J40_GPIO_2 (0x04)
353#define MRF24J40_GPIO_3 (0x08)
354#define MRF24J40_GPIO_4 (0x10)
355#define MRF24J40_GPIO_5 (0x20)
357
362#define MRF24J40_TRISGPIO_TRISGP5 (0x20)
363#define MRF24J40_TRISGPIO_TRISGP4 (0x10)
364#define MRF24J40_TRISGPIO_TRISGP3 (0x08)
365#define MRF24J40_TRISGPIO_TRISGP2 (0x04)
366#define MRF24J40_TRISGPIO_TRISGP1 (0x02)
367#define MRF24J40_TRISGPIO_TRISGP0 (0x01)
369
374#define MRF24J40_SLPACK_SLPACK (0x80)
376
381#define MRF24J40_RFCTL_WAKECNT8 (0x10)
382#define MRF24J40_RFCTL_WAKECNT7 (0x08)
383#define MRF24J40_RFCTL_RFRST (0x04)
384#define MRF24J40_RFCTL_RFTXMODE (0x02)
385#define MRF24J40_RFCTL_RFRXMODE (0x01)
387
392#define MRF24J40_BBREG1_RXDECINV (0x04)
394
399#define MRF24J40_BBREG2_CCAMODE3 (0xC0)
400#define MRF25J40_BBREG2_CCAMODE1 (0x80)
401#define MRF24J40_BBREG2_CCAMODE2 (0x40)
402
403#define MRF24J40_BBREG2_CCACSTH (0x3C)
405
410#define MRF24J40_BBREG6_RSSIMODE1 (0x80)
411#define MRF24J40_BBREG6_RSSIMODE2 (0x40)
412#define MRF24J40_BBREG2_RSSIRDY (0x01)
413
414#define MRF24J40_BBREG2_CCACSTH (0x3C)
416
421#define MRF24J40_RFCON1_VCOOPT7 (0x80)
422#define MRF24J40_RFCON1_VCOOPT6 (0x40)
423#define MRF24J40_RFCON1_VCOOPT5 (0x20)
424#define MRF24J40_RFCON1_VCOOPT4 (0x10)
425#define MRF24J40_RFCON1_VCOOPT3 (0x08)
426#define MRF24J40_RFCON1_VCOOPT2 (0x04)
427#define MRF24J40_RFCON1_VCOOPT1 (0x02)
428#define MRF24J40_RFCON1_VCOOPT0 (0x01)
430
435#define MRF24J40_RFCON2_PLLEN (0x80)
437
442#define MRF24J40_RFCON6_TXFIL (0x80)
443#define MRF24J40_RFCON6_20MRECVR (0x10)
444#define MRF24J40_RFCON6_BATEN (0x08)
446
451#define MRF24J40_RFCON7_SLPCLKSEL1 (0x80)
452#define MRF24J40_RFCON7_SLPCLKSEL2 (0x40)
454
459#define MRF24J40_RFCON8_RFVCO (0x10)
461
466#define MRF24J40_RFSTATE_MASK (0xA0)
467#define MRF24J40_RFSTATE_RTSEL2 (0xE0)
468#define MRF24J40_RFSTATE_RTSEL1 (0xC0)
469#define MRF24J40_RFSTATE_RX (0xA0)
470#define MRF24J40_RFSTATE_TX (0x80)
471#define MRF24J40_RFSTATE_CALVCO (0x60)
472#define MRF24J40_RFSTATE_SLEEP (0x40)
473#define MRF24J40_RFSTATE_CALFIL (0x20)
474#define MRF24J40_RFSTATE_RESET (0x00)
476
481#define MRF24J40_SLPCON0_INTEDGE (0x02)
482#define MRF24J40_SLPCON0_SLPCLKEN (0x01)
484
489#define MRF24J40_SLPCON1_CLKOUTEN (0x20)
490#define MRF24J40_SLPCON1_SLPCLKDIV4 (0x10)
491#define MRF24J40_SLPCON1_SLPCLKDIV3 (0x08)
492#define MRF24J40_SLPCON1_SLPCLKDIV2 (0x04)
493#define MRF24J40_SLPCON1_SLPCLKDIV1 (0x02)
494#define MRF24J40_SLPCON1_SLPCLKDIV0 (0x01)
496
501#define MRF24J40_TESTMODE_RSSIWAIT1 (0x10)
502#define MRF24J40_TESTMODE_RSSIWAIT0 (0x08)
503#define MRF24J40_TESTMODE_TESTMODE2 (0x04)
504#define MRF24J40_TESTMODE_TESTMODE1 (0x02)
505#define MRF24J40_TESTMODE_TESTMODE0 (0x01)
507
508#ifdef __cplusplus
509}
510#endif
511