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Register and command definitions for MRF24J40 devices. More...
Register and command definitions for MRF24J40 devices.
Definition in file mrf24j40_registers.h.
Go to the source code of this file.
SPI access specifiers | |
| #define | MRF24J40_SHORT_ADDR_TRANS (0x00) |
| #define | MRF24J40_LONG_ADDR_TRANS (0x80) |
| #define | MRF24J40_ACCESS_READ (0x00) |
| #define | MRF24J40_ACCESS_WRITE (0x01) |
| #define | MRF24J40_ACCESS_WRITE_LNG (0x10) |
| #define | MRF24J40_ADDR_OFFSET (0x01) |
FIFO-Address-Map | |
| #define | MRF24J40_TX_NORMAL_FIFO (0x000) |
| #define | MRF24J40_TX_BEACON_FIFO (0x080) |
| #define | MRF24J40_TX_GTS1_FIFO (0x100) |
| #define | MRF24J40_TX_GTS2_FIFO (0x180) |
| #define | MRF24J40_RX_FIFO (0x300) |
Timing definition for the mrf24j40. | |
| #define | MRF24J40_RESET_DELAY (2000U) /* Datasheet MRF24J40 ~2ms */ |
| #define | MRF24J40_RESET_PULSE_WIDTH (20000U) /* 20ms (estimated */ |
| #define | MRF24J40_WAKEUP_DELAY (2000U) |
| #define | MRF24J40_DELAY_SLEEP_TOGGLE (50U) |
| Undocumented delay. | |
| #define | MRF24J40_STATE_RESET_DELAY (200U) |
Bitfield definitions for the RXMCR register (0x00) | |
| #define | MRF24J40_RXMCR_NOACKRSP (0x20) |
| #define | MRF24J40_RXMCR_PANCOORD (0x08) |
| #define | MRF24J40_RXMCR_COORD (0x04) |
| #define | MRF24J40_RXMCR_ERRPKT (0x02) |
| #define | MRF24J40_RXMCR_PROMI (0x01) |
Bitfield definitions for the RXFLUSH register (0x0D) | |
| #define | MRF24J40_RXFLUSH_WAKEPOL (0x40) |
| #define | MRF24J40_RXFLUSH_WAKEPAD (0x20) |
| #define | MRF24J40_RXFLUSH_CMDONLY (0x08) |
| #define | MRF24J40_RXFLUSH_DATAONLY (0x04) |
| #define | MRF24J40_RXFLUSH_BCNONLY (0x02) |
| #define | MRF24J40_RXFLUSH_RXFLUSH (0x01) |
| #define | MRF24J40_TXMCR_CSMA_BACKOFF_MASK (0x07) |
| Bitfield definitions for the TXMCR register (0x11) | |
| #define | MRF24J40_TXMCR_MACMINBE (0x18) |
| #define | MRF24J40_TXMCR_NOCSMA (0x80) |
| #define | MRF24J40_TXMCR_BATLIFEXT (0x40) |
| #define | MRF24J40_TXMCR_SLOTTED (0x20) |
| #define | MRF24J40_TXMCR_MACMINBE1 (0x10) |
| #define | MRF24J40_TXMCR_MACMINBE0 (0x08) |
| #define | MRF24J40_TXMCR_CSMABF2 (0x04) |
| #define | MRF24J40_TXMCR_CSMABF1 (0x02) |
| #define | MRF24J40_TXMCR_CSMABF0 (0x01) |
| #define | MRF24J40_TXMCR_MACMINBE_SHIFT (3U) |
| Shift offsets for TXMCR register (0x11) | |
| #define | MRF24J40_ACKTMOUT_DRPACK (0x80) |
| Bitfield definitions for the ACKTMOUT register (0x12) | |
| #define | MRF24J40_ACKTMOUT_MAWD6 (0x40) |
| #define | MRF24J40_ACKTMOUT_MAWD5 (0x20) |
| #define | MRF24J40_ACKTMOUT_MAWD4 (0x10) |
| #define | MRF24J40_ACKTMOUT_MAWD3 (0x08) |
| #define | MRF24J40_ACKTMOUT_MAWD2 (0x04) |
| #define | MRF24J40_ACKTMOUT_MAWD1 (0x02) |
| #define | MRF24J40_ACKTMOUT_MAWD0 (0x01) |
Bitfield definitions for the PACON2 register (0x18) | |
| #define | MRF24J40_PACON2_FIFOEN (0x80) |
| #define | MRF24J40_PACON2_TXONTS3 (0x20) |
| #define | MRF24J40_PACON2_TXONTS2 (0x10) |
| #define | MRF24J40_PACON2_TXONTS1 (0x08) |
| #define | MRF24J40_PACON2_TXONTS0 (0x04) |
| #define | MRF24J40_PACON2_TXONT8 (0x02) |
| #define | MRF24J40_PACON2_TXONT7 (0x01) |
Bitfield definitions for the TXNCON register (0x1B) | |
| #define | MRF24J40_TXNCON_FPSTAT (0x10) |
| #define | MRF24J40_TXNCON_INDIRECT (0x08) |
| #define | MRF24J40_TXNCON_TXNACKREQ (0x04) |
| #define | MRF24J40_TXNCON_TXNSECEN (0x02) |
| #define | MRF24J40_TXNCON_TXNTRIG (0x01) |
Bitfield definitions for the WAKECON register (0x22) | |
| #define | MRF24J40_WAKECON_IMMWAKE (0x80) |
| #define | MRF24J40_WAKECON_REGWAKE (0x40) |
Bitfield definitions for the TXSTAT register (0x24) | |
| #define | MRF24J40_TXSTAT_MAX_FRAME_RETRIES (0xC0) |
| #define | MRF24J40_TXSTAT_TXNRETRY1 (0x80) |
| #define | MRF24J40_TXSTAT_TXNRETRY0 (0x40) |
| #define | MRF24J40_TXSTAT_CCAFAIL (0x20) |
| #define | MRF24J40_TXSTAT_TXG2FNT (0x10) |
| #define | MRF24J40_TXSTAT_TXG1FNT (0x08) |
| #define | MRF24J40_TXSTAT_TXG2STAT (0x04) |
| #define | MRF24J40_TXSTAT_TXG1STAT (0x02) |
| #define | MRF24J40_TXSTAT_TXNSTAT (0x01) |
Shift offsets for TXSTAT register (0x24) | |
| #define | MRF24J40_TXSTAT_MAX_FRAME_RETRIES_SHIFT (6U) |
| #define | MRF24J40_TXSTAT_CCAFAIL_SHIFT (5U) |
Bitfield definitions for the SOFTRST register (0x2A) | |
| #define | MRF24J40_SOFTRST_RSTPWR (0x04) |
| #define | MRF24J40_SOFTRST_RSTBB (0x02) |
| #define | MRF24J40_SOFTRST_RSTMAC (0x01) |
Bitfield definitions for the TXSTBL register (0x2E) | |
| #define | MRF24J40_TXSTBL_RFSTBL3 (0x80) |
| #define | MRF24J40_TXSTBL_RFSTBL2 (0x40) |
| #define | MRF24J40_TXSTBL_RFSTBL1 (0x20) |
| #define | MRF24J40_TXSTBL_RFSTBL0 (0x10) |
| #define | MRF24J40_TXSTBL_MSIFS3 (0x08) |
| #define | MRF24J40_TXSTBL_MSIFS2 (0x04) |
| #define | MRF24J40_TXSTBL_MSIFS1 (0x02) |
| #define | MRF24J40_TXSTBL_MSIFS0 (0x01) |
Bitfield definitions for the INTSTAT register (0x31) | |
| #define | MRF24J40_INTSTAT_SLPIF (0x80) |
| #define | MRF24J40_INTSTAT_WAKEIF (0x40) |
| #define | MRF24J40_INTSTAT_HSYMTMRIF (0x20) |
| #define | MRF24J40_INTSTAT_SECIF (0x10) |
| #define | MRF24J40_INTSTAT_RXIF (0x08) |
| #define | MRF24J40_INTSTAT_TXG2IF (0x04) |
| #define | MRF24J40_INTSTAT_TXG1IF (0x02) |
| #define | MRF24J40_INTSTAT_TXNIF (0x01) |
Bitfield definitions for the INTCON register (0x32) | |
| #define | MRF24J40_INTCON_SLPIE (0x80) |
| #define | MRF24J40_INTCON_WAKEIE (0x40) |
| #define | MRF24J40_INTCON_HSYMTMRIE (0x20) |
| #define | MRF24J40_INTCON_SECIE (0x10) |
| #define | MRF24J40_INTCON_RXIE (0x08) |
| #define | MRF24J40_INTCON_TXG2IE (0x04) |
| #define | MRF24J40_INTCON_TXG1IE (0x02) |
| #define | MRF24J40_INTCON_TXNIE (0x01) |
Bitfield definitions for the GPIO register (0x33) | |
| #define | MRF24J40_GPIO_0 (0x01) |
| #define | MRF24J40_GPIO_1 (0x02) |
| #define | MRF24J40_GPIO_2 (0x04) |
| #define | MRF24J40_GPIO_3 (0x08) |
| #define | MRF24J40_GPIO_4 (0x10) |
| #define | MRF24J40_GPIO_5 (0x20) |
Bitfield definitions for the TRISGPIO register (0x34) | |
| #define | MRF24J40_TRISGPIO_TRISGP5 (0x20) |
| #define | MRF24J40_TRISGPIO_TRISGP4 (0x10) |
| #define | MRF24J40_TRISGPIO_TRISGP3 (0x08) |
| #define | MRF24J40_TRISGPIO_TRISGP2 (0x04) |
| #define | MRF24J40_TRISGPIO_TRISGP1 (0x02) |
| #define | MRF24J40_TRISGPIO_TRISGP0 (0x01) |
Bitfield definitions for the SLPACK register (0x35) | |
| #define | MRF24J40_SLPACK_SLPACK (0x80) |
Bitfield definitions for the RFCTL register (0x36) | |
| #define | MRF24J40_RFCTL_WAKECNT8 (0x10) |
| #define | MRF24J40_RFCTL_WAKECNT7 (0x08) |
| #define | MRF24J40_RFCTL_RFRST (0x04) |
| #define | MRF24J40_RFCTL_RFTXMODE (0x02) |
| #define | MRF24J40_RFCTL_RFRXMODE (0x01) |
Bitfield definitions for the BBREG1 register (0x39) | |
| #define | MRF24J40_BBREG1_RXDECINV (0x04) |
Bitfield definitions for the BBREG2 register (0x3A) | |
| #define | MRF24J40_BBREG2_CCAMODE3 (0xC0) |
| #define | MRF25J40_BBREG2_CCAMODE1 (0x80) |
| #define | MRF24J40_BBREG2_CCAMODE2 (0x40) |
Bitfield definitions for the BBREG6 register (0x3E) | |
| #define | MRF24J40_BBREG2_CCACSTH (0x3C) |
| #define | MRF24J40_BBREG6_RSSIMODE1 (0x80) |
| #define | MRF24J40_BBREG6_RSSIMODE2 (0x40) |
| #define | MRF24J40_BBREG2_RSSIRDY (0x01) |
| #define | MRF24J40_BBREG2_CCACSTH (0x3C) |
Bitfield definitions for the RFCON1 register (0x201) | |
| #define | MRF24J40_RFCON1_VCOOPT7 (0x80) |
| #define | MRF24J40_RFCON1_VCOOPT6 (0x40) |
| #define | MRF24J40_RFCON1_VCOOPT5 (0x20) |
| #define | MRF24J40_RFCON1_VCOOPT4 (0x10) |
| #define | MRF24J40_RFCON1_VCOOPT3 (0x08) |
| #define | MRF24J40_RFCON1_VCOOPT2 (0x04) |
| #define | MRF24J40_RFCON1_VCOOPT1 (0x02) |
| #define | MRF24J40_RFCON1_VCOOPT0 (0x01) |
Bitfield definitions for the RFCON2 register (0x202) | |
| #define | MRF24J40_RFCON2_PLLEN (0x80) |
Bitfield definitions for the RFCON6 register (0x206) | |
| #define | MRF24J40_RFCON6_TXFIL (0x80) |
| #define | MRF24J40_RFCON6_20MRECVR (0x10) |
| #define | MRF24J40_RFCON6_BATEN (0x08) |
Bitfield definitions for the RFCON7 register (0x207) | |
| #define | MRF24J40_RFCON7_SLPCLKSEL1 (0x80) |
| #define | MRF24J40_RFCON7_SLPCLKSEL2 (0x40) |
Bitfield definitions for the RFCON8 register (0x208) | |
| #define | MRF24J40_RFCON8_RFVCO (0x10) |
Bitfield definitions for the RFSTATE register (0x20F) | |
| #define | MRF24J40_RFSTATE_MASK (0xA0) |
| #define | MRF24J40_RFSTATE_RTSEL2 (0xE0) |
| #define | MRF24J40_RFSTATE_RTSEL1 (0xC0) |
| #define | MRF24J40_RFSTATE_RX (0xA0) |
| #define | MRF24J40_RFSTATE_TX (0x80) |
| #define | MRF24J40_RFSTATE_CALVCO (0x60) |
| #define | MRF24J40_RFSTATE_SLEEP (0x40) |
| #define | MRF24J40_RFSTATE_CALFIL (0x20) |
| #define | MRF24J40_RFSTATE_RESET (0x00) |
Bitfield definitions for the SLPCON1 register (0x211) | |
| #define | MRF24J40_SLPCON0_INTEDGE (0x02) |
| #define | MRF24J40_SLPCON0_SLPCLKEN (0x01) |
Bitfield definitions for the SLPCON1 register (0x212) | |
| #define | MRF24J40_SLPCON1_CLKOUTEN (0x20) |
| #define | MRF24J40_SLPCON1_SLPCLKDIV4 (0x10) |
| #define | MRF24J40_SLPCON1_SLPCLKDIV3 (0x08) |
| #define | MRF24J40_SLPCON1_SLPCLKDIV2 (0x04) |
| #define | MRF24J40_SLPCON1_SLPCLKDIV1 (0x02) |
| #define | MRF24J40_SLPCON1_SLPCLKDIV0 (0x01) |
Bitfield definitions for the TESTMODE register (0x22F) | |
| #define | MRF24J40_TESTMODE_RSSIWAIT1 (0x10) |
| #define | MRF24J40_TESTMODE_RSSIWAIT0 (0x08) |
| #define | MRF24J40_TESTMODE_TESTMODE2 (0x04) |
| #define | MRF24J40_TESTMODE_TESTMODE1 (0x02) |
| #define | MRF24J40_TESTMODE_TESTMODE0 (0x01) |
| #define MRF24J40_ACCESS_READ (0x00) |
Definition at line 34 of file mrf24j40_registers.h.
| #define MRF24J40_ACCESS_WRITE (0x01) |
Definition at line 35 of file mrf24j40_registers.h.
| #define MRF24J40_ACCESS_WRITE_LNG (0x10) |
Definition at line 36 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_DRPACK (0x80) |
Bitfield definitions for the ACKTMOUT register (0x12)
Definition at line 233 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD0 (0x01) |
Definition at line 240 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD1 (0x02) |
Definition at line 239 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD2 (0x04) |
Definition at line 238 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD3 (0x08) |
Definition at line 237 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD4 (0x10) |
Definition at line 236 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD5 (0x20) |
Definition at line 235 of file mrf24j40_registers.h.
| #define MRF24J40_ACKTMOUT_MAWD6 (0x40) |
Definition at line 234 of file mrf24j40_registers.h.
| #define MRF24J40_ADDR_OFFSET (0x01) |
Definition at line 37 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG1_RXDECINV (0x04) |
Definition at line 396 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG2_CCACSTH (0x3C) |
Definition at line 407 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG2_CCACSTH (0x3C) |
Definition at line 407 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG2_CCAMODE2 (0x40) |
Definition at line 405 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG2_CCAMODE3 (0xC0) |
Definition at line 403 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG2_RSSIRDY (0x01) |
Definition at line 416 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG6_RSSIMODE1 (0x80) |
Definition at line 414 of file mrf24j40_registers.h.
| #define MRF24J40_BBREG6_RSSIMODE2 (0x40) |
Definition at line 415 of file mrf24j40_registers.h.
| #define MRF24J40_DELAY_SLEEP_TOGGLE (50U) |
Undocumented delay.
Probably needed because the bit has to be sampled by the low speed sleep clock
Definition at line 177 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_0 (0x01) |
Definition at line 354 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_1 (0x02) |
Definition at line 355 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_2 (0x04) |
Definition at line 356 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_3 (0x08) |
Definition at line 357 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_4 (0x10) |
Definition at line 358 of file mrf24j40_registers.h.
| #define MRF24J40_GPIO_5 (0x20) |
Definition at line 359 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_HSYMTMRIE (0x20) |
Definition at line 342 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_RXIE (0x08) |
Definition at line 344 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_SECIE (0x10) |
Definition at line 343 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_SLPIE (0x80) |
Definition at line 340 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_TXG1IE (0x02) |
Definition at line 346 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_TXG2IE (0x04) |
Definition at line 345 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_TXNIE (0x01) |
Definition at line 347 of file mrf24j40_registers.h.
| #define MRF24J40_INTCON_WAKEIE (0x40) |
Definition at line 341 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_HSYMTMRIF (0x20) |
Definition at line 328 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_RXIF (0x08) |
Definition at line 330 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_SECIF (0x10) |
Definition at line 329 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_SLPIF (0x80) |
Definition at line 326 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_TXG1IF (0x02) |
Definition at line 332 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_TXG2IF (0x04) |
Definition at line 331 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_TXNIF (0x01) |
Definition at line 333 of file mrf24j40_registers.h.
| #define MRF24J40_INTSTAT_WAKEIF (0x40) |
Definition at line 327 of file mrf24j40_registers.h.
| #define MRF24J40_LONG_ADDR_TRANS (0x80) |
Definition at line 33 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_FIFOEN (0x80) |
Definition at line 248 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONT7 (0x01) |
Definition at line 254 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONT8 (0x02) |
Definition at line 253 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONTS0 (0x04) |
Definition at line 252 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONTS1 (0x08) |
Definition at line 251 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONTS2 (0x10) |
Definition at line 250 of file mrf24j40_registers.h.
| #define MRF24J40_PACON2_TXONTS3 (0x20) |
Definition at line 249 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ACKTMOUT (0x12) |
Definition at line 71 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR0 (0x230) |
Definition at line 143 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR1 (0x231) |
Definition at line 144 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR2 (0x232) |
Definition at line 145 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR3 (0x233) |
Definition at line 146 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR4 (0x234) |
Definition at line 147 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR5 (0x235) |
Definition at line 148 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR6 (0x236) |
Definition at line 149 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOEADR7 (0x237) |
Definition at line 150 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOSADR0 (0x238) |
Definition at line 151 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ASSOSADR1 (0x239) |
Definition at line 152 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG0 (0x38) |
Definition at line 106 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG1 (0x39) |
Definition at line 107 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG2 (0x3A) |
Definition at line 108 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG3 (0x3B) |
Definition at line 109 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG4 (0x3C) |
Definition at line 110 of file mrf24j40_registers.h.
| #define MRF24J40_REG_BBREG6 (0x3E) |
Definition at line 111 of file mrf24j40_registers.h.
| #define MRF24J40_REG_CCAEDTH (0x3F) |
Definition at line 112 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR0 (0x05) |
Definition at line 60 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR1 (0x06) |
Definition at line 61 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR2 (0x07) |
Definition at line 62 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR3 (0x08) |
Definition at line 63 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR4 (0x09) |
Definition at line 64 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR5 (0x0A) |
Definition at line 65 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR6 (0x0B) |
Definition at line 66 of file mrf24j40_registers.h.
| #define MRF24J40_REG_EADR7 (0x0C) |
Definition at line 67 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ESLOTG1 (0x13) |
Definition at line 72 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ESLOTG23 (0x1E) |
Definition at line 82 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ESLOTG45 (0x1F) |
Definition at line 83 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ESLOTG67 (0x20) |
Definition at line 84 of file mrf24j40_registers.h.
| #define MRF24J40_REG_FRMOFFSET (0x23) |
Definition at line 87 of file mrf24j40_registers.h.
| #define MRF24J40_REG_GATECLK (0x26) |
Definition at line 90 of file mrf24j40_registers.h.
| #define MRF24J40_REG_GPIO (0x33) |
Definition at line 101 of file mrf24j40_registers.h.
| #define MRF24J40_REG_HSYMTMRH (0x29) |
Definition at line 93 of file mrf24j40_registers.h.
| #define MRF24J40_REG_HSYMTMRL (0x28) |
Definition at line 92 of file mrf24j40_registers.h.
| #define MRF24J40_REG_INTCON (0x32) |
Definition at line 100 of file mrf24j40_registers.h.
| #define MRF24J40_REG_INTSTAT (0x31) |
Definition at line 99 of file mrf24j40_registers.h.
| #define MRF24J40_REG_MAINCNT0 (0x226) |
Definition at line 138 of file mrf24j40_registers.h.
| #define MRF24J40_REG_MAINCNT1 (0x227) |
Definition at line 139 of file mrf24j40_registers.h.
| #define MRF24J40_REG_MAINCNT2 (0x228) |
Definition at line 140 of file mrf24j40_registers.h.
| #define MRF24J40_REG_MAINCNT3 (0x229) |
Definition at line 141 of file mrf24j40_registers.h.
| #define MRF24J40_REG_ORDER (0x10) |
Definition at line 69 of file mrf24j40_registers.h.
| #define MRF24J40_REG_PACON0 (0x16) |
Definition at line 75 of file mrf24j40_registers.h.
| #define MRF24J40_REG_PACON1 (0x17) |
Definition at line 76 of file mrf24j40_registers.h.
| #define MRF24J40_REG_PACON2 (0x18) |
Definition at line 77 of file mrf24j40_registers.h.
| #define MRF24J40_REG_PANIDH (0x02) |
Definition at line 57 of file mrf24j40_registers.h.
| #define MRF24J40_REG_PANIDL (0x01) |
Definition at line 56 of file mrf24j40_registers.h.
| #define MRF24J40_REG_REMCNTH (0x225) |
Definition at line 137 of file mrf24j40_registers.h.
| #define MRF24J40_REG_REMCNTL (0x224) |
Definition at line 136 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON0 (0x200) |
Definition at line 119 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON1 (0x201) |
Definition at line 120 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON2 (0x202) |
Definition at line 121 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON3 (0x203) |
Definition at line 122 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON5 (0x205) |
Definition at line 123 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON6 (0x206) |
Definition at line 124 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON7 (0x207) |
Definition at line 125 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCON8 (0x208) |
Definition at line 126 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFCTL (0x36) |
Definition at line 104 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RFSTATE (0x20F) |
Definition at line 130 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RSSI (0x210) |
Definition at line 131 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RXFLUSH (0x0D) |
Definition at line 68 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RXMCR (0x00) |
Definition at line 55 of file mrf24j40_registers.h.
| #define MRF24J40_REG_RXSR (0x30) |
Definition at line 98 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SADRH (0x04) |
Definition at line 59 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SADRL (0x03) |
Definition at line 58 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SECCON0 (0x2C) |
Definition at line 95 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SECCON1 (0x2D) |
Definition at line 96 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SECCR2 (0x37) |
Definition at line 105 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPACK (0x35) |
Definition at line 103 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPCAL0 (0x209) |
Definition at line 127 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPCAL1 (0x20A) |
Definition at line 128 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPCAL2 (0x20B) |
Definition at line 129 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPCON0 (0x211) |
Definition at line 132 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SLPCON1 (0x220) |
Definition at line 133 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SOFTRST (0x2A) |
Definition at line 94 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SYMTICKH (0x15) |
Definition at line 74 of file mrf24j40_registers.h.
| #define MRF24J40_REG_SYMTICKL (0x14) |
Definition at line 73 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TESTMODE (0x22F) |
Definition at line 142 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TRISGPIO (0x34) |
Definition at line 102 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXBCON0 (0x1A) |
Definition at line 78 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXBCON1 (0x25) |
Definition at line 89 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXG1CON (0x1C) |
Definition at line 80 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXG2CON (0x1D) |
Definition at line 81 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXMCR (0x11) |
Definition at line 70 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXNCON (0x1B) |
Definition at line 79 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXPEND (0x21) |
Definition at line 85 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXSTAT (0x24) |
Definition at line 88 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXSTBL (0x2E) |
Definition at line 97 of file mrf24j40_registers.h.
| #define MRF24J40_REG_TXTIME (0x27) |
Definition at line 91 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE0 (0x240) |
Definition at line 153 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE1 (0x241) |
Definition at line 154 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE10 (0x24A) |
Definition at line 163 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE11 (0x24B) |
Definition at line 164 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE12 (0x24C) |
Definition at line 165 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE2 (0x242) |
Definition at line 155 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE3 (0x243) |
Definition at line 156 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE4 (0x244) |
Definition at line 157 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE5 (0x245) |
Definition at line 158 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE6 (0x246) |
Definition at line 159 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE7 (0x247) |
Definition at line 160 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE8 (0x248) |
Definition at line 161 of file mrf24j40_registers.h.
| #define MRF24J40_REG_UPNONCE9 (0x249) |
Definition at line 162 of file mrf24j40_registers.h.
| #define MRF24J40_REG_WAKECON (0x22) |
Definition at line 86 of file mrf24j40_registers.h.
| #define MRF24J40_REG_WAKETIMEH (0x223) |
Definition at line 135 of file mrf24j40_registers.h.
| #define MRF24J40_REG_WAKETIMEL (0x222) |
Definition at line 134 of file mrf24j40_registers.h.
| #define MRF24J40_RESET_DELAY (2000U) /* Datasheet MRF24J40 ~2ms */ |
Definition at line 172 of file mrf24j40_registers.h.
| #define MRF24J40_RESET_PULSE_WIDTH (20000U) /* 20ms (estimated */ |
Definition at line 173 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT0 (0x01) |
Definition at line 432 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT1 (0x02) |
Definition at line 431 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT2 (0x04) |
Definition at line 430 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT3 (0x08) |
Definition at line 429 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT4 (0x10) |
Definition at line 428 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT5 (0x20) |
Definition at line 427 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT6 (0x40) |
Definition at line 426 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON1_VCOOPT7 (0x80) |
Definition at line 425 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON2_PLLEN (0x80) |
Definition at line 439 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON6_20MRECVR (0x10) |
Definition at line 447 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON6_BATEN (0x08) |
Definition at line 448 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON6_TXFIL (0x80) |
Definition at line 446 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON7_SLPCLKSEL1 (0x80) |
Definition at line 455 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON7_SLPCLKSEL2 (0x40) |
Definition at line 456 of file mrf24j40_registers.h.
| #define MRF24J40_RFCON8_RFVCO (0x10) |
Definition at line 463 of file mrf24j40_registers.h.
| #define MRF24J40_RFCTL_RFRST (0x04) |
Definition at line 387 of file mrf24j40_registers.h.
| #define MRF24J40_RFCTL_RFRXMODE (0x01) |
Definition at line 389 of file mrf24j40_registers.h.
| #define MRF24J40_RFCTL_RFTXMODE (0x02) |
Definition at line 388 of file mrf24j40_registers.h.
| #define MRF24J40_RFCTL_WAKECNT7 (0x08) |
Definition at line 386 of file mrf24j40_registers.h.
| #define MRF24J40_RFCTL_WAKECNT8 (0x10) |
Definition at line 385 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_CALFIL (0x20) |
Definition at line 477 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_CALVCO (0x60) |
Definition at line 475 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_MASK (0xA0) |
Definition at line 470 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_RESET (0x00) |
Definition at line 478 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_RTSEL1 (0xC0) |
Definition at line 472 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_RTSEL2 (0xE0) |
Definition at line 471 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_RX (0xA0) |
Definition at line 473 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_SLEEP (0x40) |
Definition at line 476 of file mrf24j40_registers.h.
| #define MRF24J40_RFSTATE_TX (0x80) |
Definition at line 474 of file mrf24j40_registers.h.
| #define MRF24J40_RX_FIFO (0x300) |
Definition at line 48 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_BCNONLY (0x02) |
Definition at line 200 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_CMDONLY (0x08) |
Definition at line 198 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_DATAONLY (0x04) |
Definition at line 199 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_RXFLUSH (0x01) |
Definition at line 201 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_WAKEPAD (0x20) |
Definition at line 197 of file mrf24j40_registers.h.
| #define MRF24J40_RXFLUSH_WAKEPOL (0x40) |
Definition at line 196 of file mrf24j40_registers.h.
| #define MRF24J40_RXMCR_COORD (0x04) |
Definition at line 187 of file mrf24j40_registers.h.
| #define MRF24J40_RXMCR_ERRPKT (0x02) |
Definition at line 188 of file mrf24j40_registers.h.
| #define MRF24J40_RXMCR_NOACKRSP (0x20) |
Definition at line 185 of file mrf24j40_registers.h.
| #define MRF24J40_RXMCR_PANCOORD (0x08) |
Definition at line 186 of file mrf24j40_registers.h.
| #define MRF24J40_RXMCR_PROMI (0x01) |
Definition at line 189 of file mrf24j40_registers.h.
| #define MRF24J40_SHORT_ADDR_TRANS (0x00) |
Definition at line 32 of file mrf24j40_registers.h.
| #define MRF24J40_SLPACK_SLPACK (0x80) |
Definition at line 378 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON0_INTEDGE (0x02) |
Definition at line 485 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON0_SLPCLKEN (0x01) |
Definition at line 486 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_CLKOUTEN (0x20) |
Definition at line 493 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_SLPCLKDIV0 (0x01) |
Definition at line 498 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_SLPCLKDIV1 (0x02) |
Definition at line 497 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_SLPCLKDIV2 (0x04) |
Definition at line 496 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_SLPCLKDIV3 (0x08) |
Definition at line 495 of file mrf24j40_registers.h.
| #define MRF24J40_SLPCON1_SLPCLKDIV4 (0x10) |
Definition at line 494 of file mrf24j40_registers.h.
| #define MRF24J40_SOFTRST_RSTBB (0x02) |
Definition at line 304 of file mrf24j40_registers.h.
| #define MRF24J40_SOFTRST_RSTMAC (0x01) |
Definition at line 305 of file mrf24j40_registers.h.
| #define MRF24J40_SOFTRST_RSTPWR (0x04) |
Definition at line 303 of file mrf24j40_registers.h.
| #define MRF24J40_STATE_RESET_DELAY (200U) |
Definition at line 178 of file mrf24j40_registers.h.
| #define MRF24J40_TESTMODE_RSSIWAIT0 (0x08) |
Definition at line 506 of file mrf24j40_registers.h.
| #define MRF24J40_TESTMODE_RSSIWAIT1 (0x10) |
Definition at line 505 of file mrf24j40_registers.h.
| #define MRF24J40_TESTMODE_TESTMODE0 (0x01) |
Definition at line 509 of file mrf24j40_registers.h.
| #define MRF24J40_TESTMODE_TESTMODE1 (0x02) |
Definition at line 508 of file mrf24j40_registers.h.
| #define MRF24J40_TESTMODE_TESTMODE2 (0x04) |
Definition at line 507 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP0 (0x01) |
Definition at line 371 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP1 (0x02) |
Definition at line 370 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP2 (0x04) |
Definition at line 369 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP3 (0x08) |
Definition at line 368 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP4 (0x10) |
Definition at line 367 of file mrf24j40_registers.h.
| #define MRF24J40_TRISGPIO_TRISGP5 (0x20) |
Definition at line 366 of file mrf24j40_registers.h.
| #define MRF24J40_TX_BEACON_FIFO (0x080) |
Definition at line 45 of file mrf24j40_registers.h.
| #define MRF24J40_TX_GTS1_FIFO (0x100) |
Definition at line 46 of file mrf24j40_registers.h.
| #define MRF24J40_TX_GTS2_FIFO (0x180) |
Definition at line 47 of file mrf24j40_registers.h.
| #define MRF24J40_TX_NORMAL_FIFO (0x000) |
Definition at line 44 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_BATLIFEXT (0x40) |
Definition at line 212 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_CSMA_BACKOFF_MASK (0x07) |
Bitfield definitions for the TXMCR register (0x11)
Definition at line 208 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_CSMABF0 (0x01) |
Definition at line 218 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_CSMABF1 (0x02) |
Definition at line 217 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_CSMABF2 (0x04) |
Definition at line 216 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_MACMINBE (0x18) |
Definition at line 210 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_MACMINBE0 (0x08) |
Definition at line 215 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_MACMINBE1 (0x10) |
Definition at line 214 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_MACMINBE_SHIFT (3U) |
Shift offsets for TXMCR register (0x11)
Definition at line 226 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_NOCSMA (0x80) |
Definition at line 211 of file mrf24j40_registers.h.
| #define MRF24J40_TXMCR_SLOTTED (0x20) |
Definition at line 213 of file mrf24j40_registers.h.
| #define MRF24J40_TXNCON_FPSTAT (0x10) |
Definition at line 261 of file mrf24j40_registers.h.
| #define MRF24J40_TXNCON_INDIRECT (0x08) |
Definition at line 262 of file mrf24j40_registers.h.
| #define MRF24J40_TXNCON_TXNACKREQ (0x04) |
Definition at line 263 of file mrf24j40_registers.h.
| #define MRF24J40_TXNCON_TXNSECEN (0x02) |
Definition at line 264 of file mrf24j40_registers.h.
| #define MRF24J40_TXNCON_TXNTRIG (0x01) |
Definition at line 265 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_CCAFAIL (0x20) |
Definition at line 283 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_CCAFAIL_SHIFT (5U) |
Definition at line 296 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_MAX_FRAME_RETRIES (0xC0) |
Definition at line 280 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_MAX_FRAME_RETRIES_SHIFT (6U) |
Definition at line 295 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXG1FNT (0x08) |
Definition at line 285 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXG1STAT (0x02) |
Definition at line 287 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXG2FNT (0x10) |
Definition at line 284 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXG2STAT (0x04) |
Definition at line 286 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXNRETRY0 (0x40) |
Definition at line 282 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXNRETRY1 (0x80) |
Definition at line 281 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTAT_TXNSTAT (0x01) |
Definition at line 288 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_MSIFS0 (0x01) |
Definition at line 319 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_MSIFS1 (0x02) |
Definition at line 318 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_MSIFS2 (0x04) |
Definition at line 317 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_MSIFS3 (0x08) |
Definition at line 316 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_RFSTBL0 (0x10) |
Definition at line 315 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_RFSTBL1 (0x20) |
Definition at line 314 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_RFSTBL2 (0x40) |
Definition at line 313 of file mrf24j40_registers.h.
| #define MRF24J40_TXSTBL_RFSTBL3 (0x80) |
Definition at line 312 of file mrf24j40_registers.h.
| #define MRF24J40_WAKECON_IMMWAKE (0x80) |
Definition at line 272 of file mrf24j40_registers.h.
| #define MRF24J40_WAKECON_REGWAKE (0x40) |
Definition at line 273 of file mrf24j40_registers.h.
| #define MRF24J40_WAKEUP_DELAY (2000U) |
Definition at line 175 of file mrf24j40_registers.h.
| #define MRF25J40_BBREG2_CCAMODE1 (0x80) |
Definition at line 404 of file mrf24j40_registers.h.
1.9.8