cpu_conf.h

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/*
 * SPDX-FileCopyrightText: 2021 Mesotic SAS
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#include "vendor/nrf9160.h"
#include "vendor/nrf9160_bitfields.h"
#include "vendor/nrf9160_peripherals.h"
 
#include "cpu_conf_common.h"
 
#ifdef __cplusplus
extern "C" {
#endif

#define CPU_DEFAULT_IRQ_PRIO            (1U)    
#define CPU_FLASH_BASE                  (0x00000000) 
 
#define CPU_IRQ_NUMOF                   (65U)   

#define FLASHPAGE_SIZE              (4096U) 
#define FLASHPAGE_NUMOF             (256U)  
 
/* The minimum block size which can be written is 4B. However, the erase
 * block is always FLASHPAGE_SIZE.
 */
#define FLASHPAGE_WRITE_BLOCK_SIZE      (4U) 
/* Writing should be always 4 bytes aligned */
#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U) 
 
#ifdef __cplusplus
}
#endif