nRF9160 specific CPU configuration More...

Detailed Description

nRF9160 specific CPU configuration

Author: Dylan Laduranty dylan.nosp@m..lad.nosp@m.urant.nosp@m.y@me.nosp@m.sotic.nosp@m..com

Definition in file cpu_conf.h.

#include "vendor/nrf9160.h"
#include "vendor/nrf9160_bitfields.h"
#include "vendor/nrf9160_peripherals.h"
#include "cpu_conf_common.h"

Include dependency graph for cpu_conf.h:

Go to the source code of this file.

ARM Cortex-M specific CPU configuration
#define	CPU_DEFAULT_IRQ_PRIO (1U)
	Default ARM IRQ priority.

#define	CPU_FLASH_BASE (0x00000000)
	ROM Base Address.

#define	CPU_IRQ_NUMOF (65U)
	nRF9160 specific IRQ count

Flash page configuration
#define	FLASHPAGE_SIZE (4096U)
	Size of a page in bytes.

#define	FLASHPAGE_NUMOF (256U)
	Total number of flash pages.

#define	FLASHPAGE_WRITE_BLOCK_SIZE (4U)
	Minimum block size.

#define	FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
	Mandatory alignment.

Macro Definition Documentation

◆ CPU_DEFAULT_IRQ_PRIO

#define CPU_DEFAULT_IRQ_PRIO (1U)

Default ARM IRQ priority.

Definition at line 33 of file cpu_conf.h.

◆ CPU_FLASH_BASE

#define CPU_FLASH_BASE (0x00000000)

ROM Base Address.

Definition at line 34 of file cpu_conf.h.

◆ CPU_IRQ_NUMOF

#define CPU_IRQ_NUMOF (65U)

nRF9160 specific IRQ count

Definition at line 36 of file cpu_conf.h.

◆ FLASHPAGE_NUMOF

#define FLASHPAGE_NUMOF (256U)

Total number of flash pages.

Definition at line 44 of file cpu_conf.h.

◆ FLASHPAGE_SIZE

#define FLASHPAGE_SIZE (4096U)

Size of a page in bytes.

Definition at line 43 of file cpu_conf.h.

◆ FLASHPAGE_WRITE_BLOCK_ALIGNMENT

#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)

Mandatory alignment.

Definition at line 51 of file cpu_conf.h.

◆ FLASHPAGE_WRITE_BLOCK_SIZE

#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)

Minimum block size.

Definition at line 49 of file cpu_conf.h.