periph_common_conf.h

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/*
 * SPDX-FileCopyrightText: 2020 Koen Zandberg <koen@bergzand.net>
 * SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#include "macros/units.h"
#include "periph_cpu.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(MODULE_USBDEV_SYNOPSYS_DWC2) || defined(MODULE_TINYUSB_DEVICE)
/* If the USB OTG peripheral is used, the USB clock of 48 MHz is derived by
 * dividing the PLL clock by 1, 1.5, 2, or 2.5. That is the maximum core clock
 * frequency can be 96 MHz. */
#define CLOCK_CORECLOCK         MHZ(96)     
#else
#define CLOCK_CORECLOCK         MHZ(108)    
#endif
 
#define CLOCK_AHB               CLOCK_CORECLOCK 
#define CLOCK_APB1              CLOCK_AHB/2     
#define CLOCK_APB2              CLOCK_AHB       

#if CONFIG_BOARD_HAS_LXTAL
#define RTT_CLOCK_FREQUENCY (32768U)        
#else
#define RTT_CLOCK_FREQUENCY (40000U)        
#endif
 
#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY)   /* maximum RTT frequency in Hz */
 
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY       (RTT_MAX_FREQUENCY)     /* RTT frequency in Hz */
#endif
 
#ifdef __cplusplus
}
#endif