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periph_cpu.h
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1/*
2 * Copyright (C) 2015-2016 Freie Universität Berlin
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CPU_H
21#define PERIPH_CPU_H
22
23#include <limits.h>
24
25#include "periph_cpu_common.h"
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
35#define PM_NUM_MODES (4)
42#ifndef PM_BLOCKER_INITIAL
43#define PM_BLOCKER_INITIAL { 1, 0, 0, 0 }
44#endif
45
50#define SAMD21_PM_STANDBY (0U)
51#define SAMD21_PM_IDLE_2 (1U)
52#define SAMD21_PM_IDLE_1 (2U)
53#define SAMD21_PM_IDLE_0 (3U)
60#define SAM0_SPI_PM_BLOCK SAMD21_PM_IDLE_1
67#define SAM0_USB_ACTIVE_PM_BLOCK SAMD21_PM_IDLE_1
74enum {
80};
88#define SPI_HWCS(x) (UINT_MAX - 1)
89
97static inline int _sercom_id(SercomUsart *sercom)
98{
99 return ((((uint32_t)sercom) >> 10) & 0x7) - 2;
100}
101
105static const gpio_t sam0_adc_pins[1][20] = {
106 {
107 GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9),
108 GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7),
109 GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3),
110 GPIO_PIN(PB, 4), GPIO_PIN(PB, 5), GPIO_PIN(PB, 6), GPIO_PIN(PB, 7),
111 GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11),
112 }
113};
114
119#define ADC_INPUTCTRL_MUXPOS_PA02 ADC_INPUTCTRL_MUXPOS_PIN0
120#define ADC_INPUTCTRL_MUXPOS_PA03 ADC_INPUTCTRL_MUXPOS_PIN1
121#define ADC_INPUTCTRL_MUXPOS_PB08 ADC_INPUTCTRL_MUXPOS_PIN2
122#define ADC_INPUTCTRL_MUXPOS_PB09 ADC_INPUTCTRL_MUXPOS_PIN3
123#define ADC_INPUTCTRL_MUXPOS_PA04 ADC_INPUTCTRL_MUXPOS_PIN4
124#define ADC_INPUTCTRL_MUXPOS_PA05 ADC_INPUTCTRL_MUXPOS_PIN5
125#define ADC_INPUTCTRL_MUXPOS_PA06 ADC_INPUTCTRL_MUXPOS_PIN6
126#define ADC_INPUTCTRL_MUXPOS_PA07 ADC_INPUTCTRL_MUXPOS_PIN7
127#define ADC_INPUTCTRL_MUXPOS_PB00 ADC_INPUTCTRL_MUXPOS_PIN8
128#define ADC_INPUTCTRL_MUXPOS_PB01 ADC_INPUTCTRL_MUXPOS_PIN9
129#define ADC_INPUTCTRL_MUXPOS_PB02 ADC_INPUTCTRL_MUXPOS_PIN10
130#define ADC_INPUTCTRL_MUXPOS_PB03 ADC_INPUTCTRL_MUXPOS_PIN11
131#define ADC_INPUTCTRL_MUXPOS_PB04 ADC_INPUTCTRL_MUXPOS_PIN12
132#define ADC_INPUTCTRL_MUXPOS_PB05 ADC_INPUTCTRL_MUXPOS_PIN13
133#define ADC_INPUTCTRL_MUXPOS_PB06 ADC_INPUTCTRL_MUXPOS_PIN14
134#define ADC_INPUTCTRL_MUXPOS_PB07 ADC_INPUTCTRL_MUXPOS_PIN15
135#define ADC_INPUTCTRL_MUXPOS_PA08 ADC_INPUTCTRL_MUXPOS_PIN16
136#define ADC_INPUTCTRL_MUXPOS_PA09 ADC_INPUTCTRL_MUXPOS_PIN17
137#define ADC_INPUTCTRL_MUXPOS_PA10 ADC_INPUTCTRL_MUXPOS_PIN18
138#define ADC_INPUTCTRL_MUXPOS_PA11 ADC_INPUTCTRL_MUXPOS_PIN19
140#define ADC_INPUTCTRL_MUXNEG_PA02 ADC_INPUTCTRL_MUXPOS_PIN0
141#define ADC_INPUTCTRL_MUXNEG_PA03 ADC_INPUTCTRL_MUXPOS_PIN1
142#define ADC_INPUTCTRL_MUXNEG_PB08 ADC_INPUTCTRL_MUXPOS_PIN2
143#define ADC_INPUTCTRL_MUXNEG_PB09 ADC_INPUTCTRL_MUXPOS_PIN3
144#define ADC_INPUTCTRL_MUXNEG_PA04 ADC_INPUTCTRL_MUXPOS_PIN4
145#define ADC_INPUTCTRL_MUXNEG_PA05 ADC_INPUTCTRL_MUXPOS_PIN5
146#define ADC_INPUTCTRL_MUXNEG_PA06 ADC_INPUTCTRL_MUXPOS_PIN6
147#define ADC_INPUTCTRL_MUXNEG_PA07 ADC_INPUTCTRL_MUXPOS_PIN7
153#define DAC_RES_BITS (10)
154
158#define DAC_NUMOF (1)
159
164#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
165
166#define RTT_MAX_VALUE (0xffffffff)
167#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
168#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
169#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
178 uint64_t bootloader_size : 3;
179 uint64_t reserved_0 : 1;
180 uint64_t eeprom_size : 3;
181 uint64_t reserved_1 : 1;
182 uint64_t bod33_level : 6;
183 uint64_t bod33_enable : 1;
184 uint64_t bod33_action : 2;
185 uint64_t reserved_2 : 8;
186 uint64_t wdt_enable : 1;
187 uint64_t wdt_always_on : 1;
188 uint64_t wdt_period : 4;
189 uint64_t wdt_window : 4;
190 uint64_t wdt_ewoffset : 4;
191 uint64_t wdt_window_enable : 1;
192 uint64_t bod33_hysteresis : 1;
193 const uint64_t bod12_calibration : 1;
194 uint64_t reserved_3 : 6;
195 uint64_t nvm_locks : 16;
196};
199#ifdef __cplusplus
200}
201#endif
202
203#endif /* PERIPH_CPU_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ PB
port B
@ PA
port A
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition periph_cpu.h:75
@ SAM0_GCLK_DISABLED
disabled GCLK
Definition periph_cpu.h:79
@ SAM0_GCLK_1KHZ
1 kHz clock
Definition periph_cpu.h:78
@ SAM0_GCLK_32KHZ
32 kHz clock
Definition periph_cpu.h:77
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:76
static const gpio_t sam0_adc_pins[1][20]
Pins that can be used for ADC input.
Definition periph_cpu.h:105
static int _sercom_id(SercomUsart *sercom)
Return the numeric id of a SERCOM device derived from its address.
Definition periph_cpu.h:97
NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on.
Definition periph_cpu.h:177
uint64_t bod33_level
BOD33 threshold level at power-on.
Definition periph_cpu.h:182
uint64_t wdt_window
WDT Window at power-on.
Definition periph_cpu.h:189
uint64_t wdt_window_enable
WDT Window mode enabled on power-on
Definition periph_cpu.h:191
uint64_t nvm_locks
NVM Region Lock Bits.
Definition periph_cpu.h:195
uint64_t bod33_hysteresis
BOD33 Hysteresis configuration
Definition periph_cpu.h:192
uint64_t bod33_action
BOD33 Action at power-on.
Definition periph_cpu.h:184
uint64_t bod33_enable
BOD33 Enable at power-on.
Definition periph_cpu.h:183
uint64_t wdt_period
WDT Period at power-on.
Definition periph_cpu.h:188
uint64_t reserved_2
Factory settings - do not change.
Definition periph_cpu.h:185
uint64_t bootloader_size
BOOTPROT: Bootloader Size
Definition periph_cpu.h:178
uint64_t wdt_ewoffset
WDT Early Warning Interrupt Offset
Definition periph_cpu.h:190
uint64_t eeprom_size
one of eight different EEPROM sizes
Definition periph_cpu.h:180
uint64_t reserved_0
Factory settings - do not change.
Definition periph_cpu.h:179
uint64_t reserved_1
Factory settings - do not change.
Definition periph_cpu.h:181
uint64_t wdt_always_on
WDT Always-On at power-on.
Definition periph_cpu.h:187
const uint64_t bod12_calibration
Factory settings - do not change.
Definition periph_cpu.h:193
uint64_t reserved_3
Factory settings - do not change.
Definition periph_cpu.h:194
uint64_t wdt_enable
WDT Enable at power-on.
Definition periph_cpu.h:186