32#define SI1133_I2C_ADDRESS        (0x52)   
   38#define SI1133_REG_PART_ID        (0x00) 
   39#define SI1133_REG_HW_ID          (0x01) 
   40#define SI1133_REG_REV_ID         (0x02) 
   41#define SI1133_REG_INFO0          (0x03) 
   42#define SI1133_REG_INFO1          (0x04) 
   43#define SI1133_REG_HOSTIN0        (0x0a) 
   44#define SI1133_REG_COMMAND        (0x0b) 
   45#define SI1133_REG_IRQENABLE      (0x0f)   
   46#define SI1133_REG_RESPONSE1      (0x10) 
   47#define SI1133_REG_RESPONSE0      (0x11) 
   48#define SI1133_REG_IRQ_STATUS     (0x12) 
   49#define SI1133_REG_HOSTOUTx       (0x13)   
   56#define SI1133_CMD_RESET_CMD_CTR  (0x00) 
   57#define SI1133_CMD_RESET_SW       (0x01) 
   58#define SI1133_CMD_FORCE          (0x11) 
   59#define SI1133_CMD_PAUSE          (0x12) 
   60#define SI1133_CMD_START          (0x13) 
   61#define SI1133_CMD_PARAM_QUERY    (0x40)     
   62#define SI1133_CMD_PARAM_SET      (0x80)     
   88#define SI1133_PARAM_I2C_ADDR     (0x00) 
   89#define SI1133_PARAM_CHAN_LIST    (0x01) 
   90#define SI1133_PARAM_ADCCONFIG0   (0x02) 
   91#define SI1133_PARAM_ADCSENS0     (0x03) 
   92#define SI1133_PARAM_ADCPOST0     (0x04) 
   93#define SI1133_PARAM_MEASCONFIG0  (0x05) 
   94#define SI1133_PARAM_ADCCONFIG1   (0x06) 
   95#define SI1133_PARAM_ADCSENS1     (0x07) 
   96#define SI1133_PARAM_ADCPOST1     (0x08) 
   97#define SI1133_PARAM_MEASCONFIG1  (0x09) 
   98#define SI1133_PARAM_ADCCONFIG2   (0x0a) 
   99#define SI1133_PARAM_ADCSENS2     (0x0b) 
  100#define SI1133_PARAM_ADCPOST2     (0x0c) 
  101#define SI1133_PARAM_MEASCONFIG2  (0x0d) 
  102#define SI1133_PARAM_ADCCONFIG3   (0x0e) 
  103#define SI1133_PARAM_ADCSENS3     (0x0f) 
  104#define SI1133_PARAM_ADCPOST3     (0x10) 
  105#define SI1133_PARAM_MEASCONFIG3  (0x11) 
  106#define SI1133_PARAM_ADCCONFIG4   (0x12) 
  107#define SI1133_PARAM_ADCSENS4     (0x13) 
  108#define SI1133_PARAM_ADCPOST4     (0x14) 
  109#define SI1133_PARAM_MEASCONFIG4  (0x15) 
  110#define SI1133_PARAM_ADCCONFIG5   (0x16) 
  111#define SI1133_PARAM_ADCSENS5     (0x17) 
  112#define SI1133_PARAM_ADCPOST5     (0x18) 
  113#define SI1133_PARAM_MEASCONFIG5  (0x19) 
  114#define SI1133_PARAM_MEASRATE_H   (0x1a) 
  115#define SI1133_PARAM_MEASRATE_L   (0x1b) 
  116#define SI1133_PARAM_MEASCOUNT0   (0x1c) 
  117#define SI1133_PARAM_MEASCOUNT1   (0x1d) 
  118#define SI1133_PARAM_MEASCOUNT2   (0x1e) 
  119#define SI1133_PARAM_THRESHOLD0_H (0x25) 
  120#define SI1133_PARAM_THRESHOLD0_L (0x26) 
  121#define SI1133_PARAM_THRESHOLD1_H (0x27) 
  122#define SI1133_PARAM_THRESHOLD1_L (0x28) 
  123#define SI1133_PARAM_THRESHOLD2_H (0x29) 
  124#define SI1133_PARAM_THRESHOLD2_L (0x2a) 
  125#define SI1133_PARAM_BURST        (0x2b) 
  132#define SI1133_RESP0_COUNTER_MASK (0x0f) 
  133#define SI1133_RESP0_CMD_ERR_MASK (0x10) 
  134#define SI1133_RESP0_SLEEP_MASK   (0x20) 
  135#define SI1133_RESP0_SUSPEND_MASK (0x40) 
  136#define SI1133_RESP0_RUNNING_MASK (0x80) 
  139#define SI1133_RESP0_ERR_INVALID_COMMAND    (0x01) 
  140#define SI1133_RESP0_ERR_INVALID_PARAM_ADDR (0x80) 
  141#define SI1133_RESP0_ERR_ADC_OVERFLOW       (0x88) 
  142#define SI1133_RESP0_ERR_BUFFER_OVERFLOW    (0x89) 
  149#define SI1133_ADCCONFIG_DECIM_RATE_MASK    (0x60) 
  150#define SI1133_ADCCONFIG_DECIM_RATE_SHIFT   (5u) 
  151#define SI1133_ADCCONFIG_ADCMUX_MASK        (0x1f) 
  152#define SI1133_ADCCONFIG_ADCMUX_SHIFT       (0u) 
  154#define SI1133_ADCSENS_HSIG_MASK            (0x80) 
  155#define SI1133_ADCSENS_SW_GAIN_MASK         (0x70) 
  156#define SI1133_ADCSENS_SW_GAIN_SHIFT        (4u) 
  157#define SI1133_ADCSENS_HW_GAIN_MASK         (0x0f) 
  158#define SI1133_ADCSENS_HW_GAIN_SHIFT        (0u) 
  160#define SI1133_ADCPOST_24BIT_OUT_MASK       (0x40) 
  161#define SI1133_ADCPOST_POSTSHIFT_MASK       (0x38) 
  162#define SI1133_ADCPOST_POSTSHIFT_SHIFT      (3u) 
  163#define SI1133_ADCPOST_THRESH_SEL_MASK      (0x03) 
  164#define SI1133_ADCPOST_THRESH_SEL_SHIFT     (0u) 
  166#define SI1133_MEASCONFIG_COUNTER_IDX_MASK  (0xc0) 
  167#define SI1133_MEASCONFIG_COUNTER_IDX_SHIFT (6u) 
  174#define SI1133_ADCMUX_SMALL_IR    (0u) 
  175#define SI1133_ADCMUX_MEDIUM_IR   (1u) 
  176#define SI1133_ADCMUX_LARGE_IR    (2u) 
  177#define SI1133_ADCMUX_WHITE       (11u) 
  178#define SI1133_ADCMUX_LARGE_WHITE (13u) 
  179#define SI1133_ADCMUX_UV          (24u) 
  180#define SI1133_ADCMUX_DEEP_UV     (25u) 
  187#define SI1133_ID                              (0x33) 
  188#define SI1133_STARTUP_TIME_MS                 (25u) 
  189#define SI1133_NUM_CHANNELS                    (6u) 
struct _si1133_channel_params si1133_channel_params_t
Si1133 channel parameters.
 
Si1133 channel parameters.
 
uint8_t adcsens
ADCSENSx register.
 
uint8_t measconfig
MEASCONFIGx register.
 
uint8_t adcpost
ADCPOSTx register.
 
uint8_t adcconfig
ADCCONFIGx register.