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cfg_spi_default.h File Reference

Default SPI configuration for SODAQ boards. More...

Detailed Description

Default SPI configuration for SODAQ boards.

Author
Kees Bakker kees@.nosp@m.soda.nosp@m.q.com

Definition in file cfg_spi_default.h.

#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
+ Include dependency graph for cfg_spi_default.h:

Go to the source code of this file.

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

Macro Definition Documentation

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 54 of file cfg_spi_default.h.

Variable Documentation

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = &SERCOM3->SPI,
.miso_pin = GPIO_PIN(PA, 22),
.mosi_pin = GPIO_PIN(PA, 20),
.clk_pin = GPIO_PIN(PA, 21),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = SAM0_GCLK_MAIN,
},
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ PA
port A
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74

Definition at line 35 of file cfg_spi_default.h.