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can_params.h
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1/*
2 * Copyright (C) 2016 OTA keys S.A.
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
20#ifndef CAN_PARAMS_H
21#define CAN_PARAMS_H
22
23#include "can/device.h"
24#include "periph/can.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
31static const can_conf_t candev_conf[] = {
32 {
33#if defined(CPU_FAM_STM32F0)
34 .can = CAN,
35 .rcc_mask = RCC_APB1ENR_CANEN,
36 .rx_pin = GPIO_PIN(PORT_A, 11),
37 .tx_pin = GPIO_PIN(PORT_A, 12),
38 .af = GPIO_AF4,
39 .irqn = CEC_CAN_IRQn,
40#else
41 .can = CAN1,
42#if defined(CPU_FAM_STM32L4)
43 .rcc_mask = RCC_APB1ENR1_CAN1EN,
44#else
45 .rcc_mask = RCC_APB1ENR_CAN1EN,
46#if CANDEV_STM32_CHAN_NUMOF > 1
47 .can_master = CAN1,
48 .master_rcc_mask = RCC_APB1ENR_CAN1EN,
49 .first_filter = 0,
50 .nb_filters = 14,
51#endif
52#endif
53#if defined(CPU_FAM_STM32F1)
54 .rx_pin = GPIO_PIN(PORT_A, 11),
55 .tx_pin = GPIO_PIN(PORT_A, 12),
56#elif defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32F4)
57 .rx_pin = GPIO_PIN(PORT_B, 8),
58 .tx_pin = GPIO_PIN(PORT_B, 9),
59 .af = GPIO_AF9,
60#else
61 .rx_pin = GPIO_PIN(PORT_D, 0),
62 .tx_pin = GPIO_PIN(PORT_D, 1),
63 .af = GPIO_AF9,
64#endif
65 .tx_irqn = CAN1_TX_IRQn,
66 .rx0_irqn = CAN1_RX0_IRQn,
67 .rx1_irqn = CAN1_RX1_IRQn,
68 .sce_irqn = CAN1_SCE_IRQn,
69#endif
70 .en_deep_sleep_wake_up = true,
71 .ttcm = 0,
72 .abom = 1,
73 .awum = 1,
74 .nart = 0,
75 .rflm = 0,
76 .txfp = 0,
77 },
78#if (CANDEV_STM32_CHAN_NUMOF >= 2) && (CAN_DLL_NUMOF >= 2)
79 {
80 .can = CAN2,
81 .rcc_mask = RCC_APB1ENR_CAN2EN,
82 .can_master = CAN1,
83 .master_rcc_mask = RCC_APB1ENR_CAN1EN,
84 .first_filter = 14,
85 .nb_filters = 14,
86 .rx_pin = GPIO_PIN(PORT_B, 5),
87 .tx_pin = GPIO_PIN(PORT_B, 6),
88#ifndef CPU_FAM_STM32F1
89 .af = GPIO_AF9,
90#endif
91 .en_deep_sleep_wake_up = true,
92 .tx_irqn = CAN2_TX_IRQn,
93 .rx0_irqn = CAN2_RX0_IRQn,
94 .rx1_irqn = CAN2_RX1_IRQn,
95 .sce_irqn = CAN2_SCE_IRQn,
96 .ttcm = 0,
97 .abom = 1,
98 .awum = 1,
99 .nart = 0,
100 .rflm = 0,
101 .txfp = 0,
102 },
103#endif
104#if (CANDEV_STM32_CHAN_NUMOF >= 3) && (CAN_DLL_NUMOF >= 3)
105 {
106 .can = CAN3,
107 .rcc_mask = RCC_APB1ENR_CAN3EN,
108 .can_master = CAN3,
109 .master_rcc_mask = RCC_APB1ENR_CAN3EN,
110 .first_filter = 0,
111 .nb_filters = 14,
112 .rx_pin = GPIO_PIN(PORT_B, 3),
113 .tx_pin = GPIO_PIN(PORT_B, 4),
114 .af = GPIO_AF11,
115 .en_deep_sleep_wake_up = true,
116 .tx_irqn = CAN3_TX_IRQn,
117 .rx0_irqn = CAN3_RX0_IRQn,
118 .rx1_irqn = CAN3_RX1_IRQn,
119 .sce_irqn = CAN3_SCE_IRQn,
120 .ttcm = 0,
121 .abom = 1,
122 .awum = 1,
123 .nart = 0,
124 .rflm = 0,
125 .txfp = 0,
126 },
127#endif
128};
129
132 {
133 .name = "can_stm32_0",
134 },
135#if (CANDEV_STM32_CHAN_NUMOF >= 2) && (CAN_DLL_NUMOF >= 2)
136 {
137 .name = "can_stm32_1",
138 },
139#endif
140#if (CANDEV_STM32_CHAN_NUMOF >= 3) && (CAN_DLL_NUMOF >= 3)
141 {
142 .name = "can_stm32_2",
143 },
144#endif
145};
146
147#ifdef __cplusplus
148}
149#endif
150
151#endif /* CAN_PARAMS_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
@ PORT_D
port D
Definition periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ GPIO_AF9
use alternate function 9
Definition cpu_gpio.h:112
@ GPIO_AF11
use alternate function 11
Definition cpu_gpio.h:114
Low-level CAN peripheral driver interface definitions.
ESP CAN device configuration.
Definition can_esp.h:88
Linux candev configuration.
Parameters to initialize a candev.
Definition device.h:55
const char * name
candev name to set
Definition device.h:56
Definitions of CAN device interface.