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sx127x_registers.h
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/*
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* SPDX-FileCopyrightText: 2016 Unwired Devices <info@unwds.com>
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* SPDX-FileCopyrightText: 2016 Inria Chile
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* SPDX-FileCopyrightText: 2017 Inria
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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22
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/* Common settings */
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#define SX127X_REG_LR_OPMODE (0x01)
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#define SX127X_REG_LR_FRFMSB (0x06)
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#define SX127X_REG_LR_FRFMID (0x07)
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#define SX127X_REG_LR_FRFLSB (0x08)
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/* Tx settings */
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#define SX127X_REG_LR_PACONFIG (0x09)
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#define SX127X_REG_LR_PARAMP (0x0A)
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#define SX127X_REG_LR_OCP (0x0B)
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/* Rx settings */
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#define SX127X_REG_LR_LNA (0x0C)
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/* LoRa registers */
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#define SX127X_REG_LR_FIFOADDRPTR (0x0D)
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#define SX127X_REG_LR_FIFOTXBASEADDR (0x0E)
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#define SX127X_REG_LR_FIFORXBASEADDR (0x0F)
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#define SX127X_REG_LR_FIFORXCURRENTADDR (0x10)
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#define SX127X_REG_LR_IRQFLAGSMASK (0x11)
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#define SX127X_REG_LR_IRQFLAGS (0x12)
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#define SX127X_REG_LR_RXNBBYTES (0x13)
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#define SX127X_REG_LR_RXHEADERCNTVALUEMSB (0x14)
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#define SX127X_REG_LR_RXHEADERCNTVALUELSB (0x15)
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#define SX127X_REG_LR_RXPACKETCNTVALUEMSB (0x16)
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#define SX127X_REG_LR_RXPACKETCNTVALUELSB (0x17)
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#define SX127X_REG_LR_MODEMSTAT (0x18)
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#define SX127X_REG_LR_PKTSNRVALUE (0x19)
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#define SX127X_REG_LR_PKTRSSIVALUE (0x1A)
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#define SX127X_REG_LR_RSSIVALUE (0x1B)
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#define SX127X_REG_LR_HOPCHANNEL (0x1C)
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#define SX127X_REG_LR_MODEMCONFIG1 (0x1D)
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#define SX127X_REG_LR_MODEMCONFIG2 (0x1E)
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#define SX127X_REG_LR_SYMBTIMEOUTLSB (0x1F)
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#define SX127X_REG_LR_PREAMBLEMSB (0x20)
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#define SX127X_REG_LR_PREAMBLELSB (0x21)
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#define SX127X_REG_LR_PAYLOADLENGTH (0x22)
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#define SX127X_REG_LR_PAYLOADMAXLENGTH (0x23)
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#define SX127X_REG_LR_HOPPERIOD (0x24)
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#define SX127X_REG_LR_FIFORXBYTEADDR (0x25)
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#define SX127X_REG_LR_MODEMCONFIG3 (0x26)
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#define SX127X_REG_LR_FEIMSB (0x28)
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#define SX127X_REG_LR_FEIMID (0x29)
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#define SX127X_REG_LR_FEILSB (0x2A)
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#define SX127X_REG_LR_RSSIWIDEBAND (0x2C)
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#define SX127X_REG_LR_TEST2F (0x2F)
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#define SX127X_REG_LR_TEST30 (0x30)
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#define SX127X_REG_LR_DETECTOPTIMIZE (0x31)
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#define SX127X_REG_LR_INVERTIQ (0x33)
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#define SX127X_REG_LR_TEST36 (0x36)
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#define SX127X_REG_LR_DETECTIONTHRESHOLD (0x37)
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#define SX127X_REG_LR_SYNCWORD (0x39)
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#define SX127X_REG_LR_TEST3A (0x3A)
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#define SX127X_REG_LR_INVERTIQ2 (0x3B)
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/* I/O settings */
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#define SX127X_REG_LR_DIOMAPPING1 (0x40)
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#define SX127X_REG_LR_DIOMAPPING2 (0x41)
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/* Version */
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#define SX127X_REG_LR_VERSION (0x42)
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/* Additional settings */
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#define SX127X_REG_LR_PLLHOP (0x44)
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#define SX127X_REG_LR_TCXO (0x4B)
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#define SX127X_REG_LR_PADAC (0x4D)
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#define SX127X_REG_LR_FORMERTEMP (0x5B)
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#define SX127X_REG_LR_BITRATEFRAC (0x5D)
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#define SX127X_REG_LR_AGCREF (0x61)
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#define SX127X_REG_LR_AGCTHRESH1 (0x62)
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#define SX127X_REG_LR_AGCTHRESH2 (0x63)
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#define SX127X_REG_LR_AGCTHRESH3 (0x64)
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#define SX127X_REG_LR_PLL (0x70)
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#define SX127X_RNG_REG_MODEM_CONFIG1 (0x0A)
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#define SX127X_RNG_REG_MODEM_CONFIG2 (0x70)
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/* RegFifo */
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#define SX127X_REG_LR_FIFO (0x00)
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/* RegOpMode */
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#define SX127X_RF_LORA_OPMODE_LONGRANGEMODE_MASK (0x7F)
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#define SX127X_RF_LORA_OPMODE_LONGRANGEMODE_OFF (0x00)
/* Default */
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#define SX127X_RF_LORA_OPMODE_LONGRANGEMODE_ON (0x80)
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#define SX127X_RF_LORA_OPMODE_ACCESSSHAREDSX127X_REG_MASK (0xBF)
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#define SX127X_RF_LORA_OPMODE_ACCESSSHAREDSX127X_REG_ENABLE (0x40)
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#define SX127X_RF_LORA_OPMODE_ACCESSSHAREDSX127X_REG_DISABLE (0x00)
/* Default */
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#define SX127X_RF_LORA_OPMODE_FREQMODE_ACCESS_MASK (0xF7)
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#define SX127X_RF_LORA_OPMODE_FREQMODE_ACCESS_LF (0x08)
/* Default */
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#define SX127X_RF_LORA_OPMODE_FREQMODE_ACCESS_HF (0x00)
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#define SX127X_RF_LORA_OPMODE_MASK (0xF8)
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#define SX127X_RF_LORA_OPMODE_SLEEP (0x00)
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#define SX127X_RF_LORA_OPMODE_STANDBY (0x01)
/* Default */
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#define SX127X_RF_LORA_OPMODE_SYNTHESIZER_TX (0x02)
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#define SX127X_RF_LORA_OPMODE_TRANSMITTER (0x03)
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#define SX127X_RF_LORA_OPMODE_SYNTHESIZER_RX (0x04)
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#define SX127X_RF_LORA_OPMODE_RECEIVER (0x05)
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/* LoRa specific modes */
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#define SX127X_RF_LORA_OPMODE_RECEIVER_SINGLE (0x06)
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#define SX127X_RF_LORA_OPMODE_CAD (0x07)
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/* RegFrf (MHz) */
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#define SX127X_RF_LORA_FRFMSB_434_MHZ (0x6C)
/* Default */
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#define SX127X_RF_LORA_FRFMID_434_MHZ (0x80)
/* Default */
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#define SX127X_RF_LORA_FRFLSB_434_MHZ (0x00)
/* Default */
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/* RegPaConfig */
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#define SX127X_RF_LORA_PACONFIG_PASELECT_MASK (0x7F)
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#define SX127X_RF_LORA_PACONFIG_PASELECT_PABOOST (0x80)
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#define SX127X_RF_LORA_PACONFIG_PASELECT_RFO (0x00)
/* Default */
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#define SX127X_RF_LORA_PACONFIG_MAX_POWER_MASK (0x8F)
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#define SX127X_RF_LORA_PACONFIG_OUTPUTPOWER_MASK (0xF0)
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/* RegPaRamp */
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#define SX127X_RF_LORA_PARAMP_TXBANDFORCE_MASK (0xEF)
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#define SX127X_RF_LORA_PARAMP_TXBANDFORCE_BAND_SEL (0x10)
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#define SX127X_RF_LORA_PARAMP_TXBANDFORCE_AUTO (0x00)
/* Default */
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#define SX127X_RF_LORA_PARAMP_MASK (0xF0)
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#define SX127X_RF_LORA_PARAMP_3400_US (0x00)
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#define SX127X_RF_LORA_PARAMP_2000_US (0x01)
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#define SX127X_RF_LORA_PARAMP_1000_US (0x02)
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#define SX127X_RF_LORA_PARAMP_0500_US (0x03)
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#define SX127X_RF_LORA_PARAMP_0250_US (0x04)
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#define SX127X_RF_LORA_PARAMP_0125_US (0x05)
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#define SX127X_RF_LORA_PARAMP_0100_US (0x06)
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#define SX127X_RF_LORA_PARAMP_0062_US (0x07)
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#define SX127X_RF_LORA_PARAMP_0050_US (0x08)
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#define SX127X_RF_LORA_PARAMP_0040_US (0x09)
/* Default */
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#define SX127X_RF_LORA_PARAMP_0031_US (0x0A)
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#define SX127X_RF_LORA_PARAMP_0025_US (0x0B)
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#define SX127X_RF_LORA_PARAMP_0020_US (0x0C)
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#define SX127X_RF_LORA_PARAMP_0015_US (0x0D)
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#define SX127X_RF_LORA_PARAMP_0012_US (0x0E)
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#define SX127X_RF_LORA_PARAMP_0010_US (0x0F)
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/* RegOcp */
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#define SX127X_RF_LORA_OCP_MASK (0xDF)
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#define SX127X_RF_LORA_OCP_ON (0x20)
/* Default */
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#define SX127X_RF_LORA_OCP_OFF (0x00)
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#define SX127X_RF_LORA_OCP_TRIM_MASK (0xE0)
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#define SX127X_RF_LORA_OCP_TRIM_045_MA (0x00)
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#define SX127X_RF_LORA_OCP_TRIM_050_MA (0x01)
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#define SX127X_RF_LORA_OCP_TRIM_055_MA (0x02)
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#define SX127X_RF_LORA_OCP_TRIM_060_MA (0x03)
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#define SX127X_RF_LORA_OCP_TRIM_065_MA (0x04)
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#define SX127X_RF_LORA_OCP_TRIM_070_MA (0x05)
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#define SX127X_RF_LORA_OCP_TRIM_075_MA (0x06)
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#define SX127X_RF_LORA_OCP_TRIM_080_MA (0x07)
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#define SX127X_RF_LORA_OCP_TRIM_085_MA (0x08)
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#define SX127X_RF_LORA_OCP_TRIM_090_MA (0x09)
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#define SX127X_RF_LORA_OCP_TRIM_095_MA (0x0A)
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#define SX127X_RF_LORA_OCP_TRIM_100_MA (0x0B)
/* Default */
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#define SX127X_RF_LORA_OCP_TRIM_105_MA (0x0C)
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#define SX127X_RF_LORA_OCP_TRIM_110_MA (0x0D)
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#define SX127X_RF_LORA_OCP_TRIM_115_MA (0x0E)
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#define SX127X_RF_LORA_OCP_TRIM_120_MA (0x0F)
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#define SX127X_RF_LORA_OCP_TRIM_130_MA (0x10)
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#define SX127X_RF_LORA_OCP_TRIM_140_MA (0x11)
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#define SX127X_RF_LORA_OCP_TRIM_150_MA (0x12)
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#define SX127X_RF_LORA_OCP_TRIM_160_MA (0x13)
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#define SX127X_RF_LORA_OCP_TRIM_170_MA (0x14)
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#define SX127X_RF_LORA_OCP_TRIM_180_MA (0x15)
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#define SX127X_RF_LORA_OCP_TRIM_190_MA (0x16)
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#define SX127X_RF_LORA_OCP_TRIM_200_MA (0x17)
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#define SX127X_RF_LORA_OCP_TRIM_210_MA (0x18)
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#define SX127X_RF_LORA_OCP_TRIM_220_MA (0x19)
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#define SX127X_RF_LORA_OCP_TRIM_230_MA (0x1A)
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#define SX127X_RF_LORA_OCP_TRIM_240_MA (0x1B)
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/* RegLna */
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#define SX127X_RF_LORA_LNA_GAIN_MASK (0x1F)
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#define SX127X_RF_LORA_LNA_GAIN_G1 (0x20)
/* Default */
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#define SX127X_RF_LORA_LNA_GAIN_G2 (0x40)
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#define SX127X_RF_LORA_LNA_GAIN_G3 (0x60)
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#define SX127X_RF_LORA_LNA_GAIN_G4 (0x80)
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#define SX127X_RF_LORA_LNA_GAIN_G5 (0xA0)
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#define SX127X_RF_LORA_LNA_GAIN_G6 (0xC0)
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#define SX127X_RF_LORA_LNA_BOOST_LF_MASK (0xE7)
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#define SX127X_RF_LORA_LNA_BOOST_LF_DEFAULT (0x00)
/* Default */
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#define SX127X_RF_LORA_LNA_BOOST_HF_MASK (0xFC)
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#define SX127X_RF_LORA_LNA_BOOST_HF_OFF (0x00)
/* Default */
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#define SX127X_RF_LORA_LNA_BOOST_HF_ON (0x03)
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/* RegFifoAddrPtr */
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#define SX127X_RF_LORA_FIFOADDRPTR (0x00)
/* Default */
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/* RegFifoTxBaseAddr */
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#define SX127X_RF_LORA_FIFOTXBASEADDR (0x80)
/* Default */
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/* RegFifoTxBaseAddr */
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#define SX127X_RF_LORA_FIFORXBASEADDR (0x00)
/* Default */
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/* RegIrqFlagsMask */
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#define SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT_MASK (0x80)
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#define SX127X_RF_LORA_IRQFLAGS_RXDONE_MASK (0x40)
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#define SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR_MASK (0x20)
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#define SX127X_RF_LORA_IRQFLAGS_VALIDHEADER_MASK (0x10)
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#define SX127X_RF_LORA_IRQFLAGS_TXDONE_MASK (0x08)
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#define SX127X_RF_LORA_IRQFLAGS_CADDONE_MASK (0x04)
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#define SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL_MASK (0x02)
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#define SX127X_RF_LORA_IRQFLAGS_CADDETECTED_MASK (0x01)
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/* RegIrqFlags */
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#define SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT (0x80)
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#define SX127X_RF_LORA_IRQFLAGS_RXDONE (0x40)
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#define SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR (0x20)
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#define SX127X_RF_LORA_IRQFLAGS_VALIDHEADER (0x10)
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#define SX127X_RF_LORA_IRQFLAGS_TXDONE (0x08)
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#define SX127X_RF_LORA_IRQFLAGS_CADDONE (0x04)
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#define SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL (0x02)
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#define SX127X_RF_LORA_IRQFLAGS_CADDETECTED (0x01)
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/* RegModemStat (Read Only) */
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#define SX127X_RF_LORA_MODEMSTAT_RX_CR_MASK (0x1F)
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_MASK (0xE0)
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_MODEM_CLEAR (0x10)
/* Default */
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_HEADER_VALID (0x08)
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_RX_ONGOING (0x04)
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_SIGNAL_SYNCHRONIZED (0x02)
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#define SX127X_RF_LORA_MODEMSTAT_MODEM_STATUS_SIGNAL_DETECTED (0x01)
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/* RegHopChannel (Read Only) */
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#define SX127X_RF_LORA_HOPCHANNEL_PLL_LOCK_TIMEOUT_MASK (0x7F)
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#define SX127X_RF_LORA_HOPCHANNEL_PLL_LOCK_FAIL (0x80)
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#define SX127X_RF_LORA_HOPCHANNEL_PLL_LOCK_SUCCEED (0x00)
/* Default */
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#define SX127X_RF_LORA_HOPCHANNEL_CRCONPAYLOAD_MASK (0xBF)
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#define SX127X_RF_LORA_HOPCHANNEL_CRCONPAYLOAD_ON (0x40)
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#define SX127X_RF_LORA_HOPCHANNEL_CRCONPAYLOAD_OFF (0x00)
/* Default */
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#define SX127X_RF_LORA_HOPCHANNEL_CHANNEL_MASK (0x3F)
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/* RegModemConfig1 */
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#define SX1272_RF_LORA_MODEMCONFIG1_BW_MASK (0x3F)
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#define SX1272_RF_LORA_MODEMCONFIG1_BW_125_KHZ (0x00)
/* Default */
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#define SX1272_RF_LORA_MODEMCONFIG1_BW_250_KHZ (0x40)
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#define SX1272_RF_LORA_MODEMCONFIG1_BW_500_KHZ (0x80)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_MASK (0x0F)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_7_81_KHZ (0x00)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_10_41_KHZ (0x10)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_15_62_KHZ (0x20)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_20_83_KHZ (0x30)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_31_25_KHZ (0x40)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_41_66_KHZ (0x50)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_62_50_KHZ (0x60)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_125_KHZ (0x70)
/* Default */
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_250_KHZ (0x80)
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#define SX1276_RF_LORA_MODEMCONFIG1_BW_500_KHZ (0x90)
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#define SX1272_RF_LORA_MODEMCONFIG1_CODINGRATE_MASK (0xC7)
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#define SX1272_RF_LORA_MODEMCONFIG1_CODINGRATE_4_5 (0x08)
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#define SX1272_RF_LORA_MODEMCONFIG1_CODINGRATE_4_6 (0x10)
/* Default */
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#define SX1272_RF_LORA_MODEMCONFIG1_CODINGRATE_4_7 (0x18)
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#define SX1272_RF_LORA_MODEMCONFIG1_CODINGRATE_4_8 (0x20)
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#define SX1276_RF_LORA_MODEMCONFIG1_CODINGRATE_MASK (0xF1)
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#define SX1276_RF_LORA_MODEMCONFIG1_CODINGRATE_4_5 (0x02)
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#define SX1276_RF_LORA_MODEMCONFIG1_CODINGRATE_4_6 (0x04)
/* Default */
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#define SX1276_RF_LORA_MODEMCONFIG1_CODINGRATE_4_7 (0x06)
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#define SX1276_RF_LORA_MODEMCONFIG1_CODINGRATE_4_8 (0x08)
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#define SX1272_RF_LORA_MODEMCONFIG1_IMPLICITHEADER_MASK (0xFB)
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#define SX1276_RF_LORA_MODEMCONFIG1_IMPLICITHEADER_MASK (0xFE)
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#define SX127X_RF_LORA_MODEMCONFIG1_IMPLICITHEADER_ON (0x01)
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#define SX127X_RF_LORA_MODEMCONFIG1_IMPLICITHEADER_OFF (0x00)
/* Default */
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#define SX1272_RF_LORA_MODEMCONFIG1_RXPAYLOADCRC_MASK (0xFD)
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#define SX1272_RF_LORA_MODEMCONFIG1_RXPAYLOADCRC_ON (0x02)
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#define SX1272_RF_LORA_MODEMCONFIG1_RXPAYLOADCRC_OFF (0x00)
/* Default */
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#define SX127X_RF_LORA_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK (0xFE)
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/* RegModemConfig2 */
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_MASK (0x0F)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_6 (0x60)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_7 (0x70)
/* Default */
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_8 (0x80)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_9 (0x90)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_10 (0xA0)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_11 (0xB0)
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#define SX127X_RF_LORA_MODEMCONFIG2_SF_12 (0xC0)
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#define SX127X_RF_LORA_MODEMCONFIG2_TXCONTINUOUSMODE_MASK (0xF7)
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#define SX127X_RF_LORA_MODEMCONFIG2_TXCONTINUOUSMODE_ON (0x08)
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#define SX127X_RF_LORA_MODEMCONFIG2_TXCONTINUOUSMODE_OFF (0x00)
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#define SX1276_RF_LORA_MODEMCONFIG2_RXPAYLOADCRC_MASK (0xFB)
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#define SX1276_RF_LORA_MODEMCONFIG2_RXPAYLOADCRC_ON (0x04)
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#define SX1276_RF_LORA_MODEMCONFIG2_RXPAYLOADCRC_OFF (0x00)
/* Default */
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#define SX127X_RF_LORA_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK (0xFC)
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#define SX127X_RF_LORA_MODEMCONFIG2_SYMBTIMEOUTMSB (0x00)
/* Default */
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/* RegSymbTimeoutLsb */
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#define SX127X_RF_LORA_SYMBTIMEOUTLSB_SYMBTIMEOUT (0x64)
/* Default */
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/* RegPreambleLengthMsb */
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#define SX127X_RF_LORA_PREAMBLELENGTHMSB (0x00)
/* Default */
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/* RegPreambleLengthLsb */
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#define SX127X_RF_LORA_PREAMBLELENGTHLSB (0x08)
/* Default */
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/* RegPayloadLength */
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#define SX127X_RF_LORA_PAYLOADLENGTH (0x0E)
/* Default */
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/* RegPayloadMaxLength */
360
#define SX127X_RF_LORA_PAYLOADMAXLENGTH (0xFF)
/* Default */
361
362
/* RegHopPeriod */
363
#define SX127X_RF_LORA_HOPPERIOD_FREQFOPPINGPERIOD (0x00)
/* Default */
364
365
/* RegModemConfig3 */
366
#define SX127X_RF_LORA_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK (0xF7)
367
#define SX127X_RF_LORA_MODEMCONFIG3_LOWDATARATEOPTIMIZE_ON (0x08)
368
#define SX127X_RF_LORA_MODEMCONFIG3_LOWDATARATEOPTIMIZE_OFF (0x00)
/* Default */
369
370
#define SX127X_RF_LORA_MODEMCONFIG3_AGCAUTO_MASK (0xFB)
371
#define SX127X_RF_LORA_MODEMCONFIG3_AGCAUTO_ON (0x04)
/* Default */
372
#define SX127X_RF_LORA_MODEMCONFIG3_AGCAUTO_OFF (0x00)
373
374
/* RegDetectOptimize */
375
#define SX127X_RF_LORA_DETECTIONOPTIMIZE_MASK (0xF8)
376
#define SX127X_RF_LORA_DETECTIONOPTIMIZE_SF7_TO_SF12 (0x03)
/* Default */
377
#define SX127X_RF_LORA_DETECTIONOPTIMIZE_SF6 (0x05)
378
379
/* RegInvertIQ */
380
#define SX127X_RF_LORA_INVERTIQ_RX_MASK (0xBF)
381
#define SX127X_RF_LORA_INVERTIQ_RX_OFF (0x00)
382
#define SX127X_RF_LORA_INVERTIQ_RX_ON (0x40)
383
#define SX127X_RF_LORA_INVERTIQ_TX_MASK (0xFE)
384
#define SX127X_RF_LORA_INVERTIQ_TX_OFF (0x01)
385
#define SX127X_RF_LORA_INVERTIQ_TX_ON (0x00)
386
387
/* RegDetectionThreshold */
388
#define SX127X_RF_LORA_DETECTIONTHRESH_SF7_TO_SF12 (0x0A)
/* Default */
389
#define SX127X_RF_LORA_DETECTIONTHRESH_SF6 (0x0C)
390
391
/* RegInvertIQ2 */
392
#define SX127X_RF_LORA_INVERTIQ2_ON (0x19)
393
#define SX127X_RF_LORA_INVERTIQ2_OFF (0x1D)
394
395
/* RegDioMapping1 */
396
#define SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK (0x3F)
397
#define SX127X_RF_LORA_DIOMAPPING1_DIO0_00 (0x00)
/* Default */
398
#define SX127X_RF_LORA_DIOMAPPING1_DIO0_01 (0x40)
399
#define SX127X_RF_LORA_DIOMAPPING1_DIO0_10 (0x80)
400
#define SX127X_RF_LORA_DIOMAPPING1_DIO0_11 (0xC0)
401
402
#define SX127X_RF_LORA_DIOMAPPING1_DIO1_MASK (0xCF)
403
#define SX127X_RF_LORA_DIOMAPPING1_DIO1_00 (0x00)
/* Default */
404
#define SX127X_RF_LORA_DIOMAPPING1_DIO1_01 (0x10)
405
#define SX127X_RF_LORA_DIOMAPPING1_DIO1_10 (0x20)
406
#define SX127X_RF_LORA_DIOMAPPING1_DIO1_11 (0x30)
407
408
#define SX127X_RF_LORA_DIOMAPPING1_DIO2_MASK (0xF3)
409
#define SX127X_RF_LORA_DIOMAPPING1_DIO2_00 (0x00)
/* Default */
410
#define SX127X_RF_LORA_DIOMAPPING1_DIO2_01 (0x04)
411
#define SX127X_RF_LORA_DIOMAPPING1_DIO2_10 (0x08)
412
#define SX127X_RF_LORA_DIOMAPPING1_DIO2_11 (0x0C)
413
414
#define SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK (0xFC)
415
#define SX127X_RF_LORA_DIOMAPPING1_DIO3_00 (0x00)
/* Default */
416
#define SX127X_RF_LORA_DIOMAPPING1_DIO3_01 (0x01)
417
#define SX127X_RF_LORA_DIOMAPPING1_DIO3_10 (0x02)
418
#define SX127X_RF_LORA_DIOMAPPING1_DIO3_11 (0x03)
419
420
/* RegDioMapping2 */
421
#define SX127X_RF_LORA_DIOMAPPING2_DIO4_MASK (0x3F)
422
#define SX127X_RF_LORA_DIOMAPPING2_DIO4_00 (0x00)
/* Default */
423
#define SX127X_RF_LORA_DIOMAPPING2_DIO4_01 (0x40)
424
#define SX127X_RF_LORA_DIOMAPPING2_DIO4_10 (0x80)
425
#define SX127X_RF_LORA_DIOMAPPING2_DIO4_11 (0xC0)
426
427
#define SX127X_RF_LORA_DIOMAPPING2_DIO5_MASK (0xCF)
428
#define SX127X_RF_LORA_DIOMAPPING2_DIO5_00 (0x00)
/* Default */
429
#define SX127X_RF_LORA_DIOMAPPING2_DIO5_01 (0x10)
430
#define SX127X_RF_LORA_DIOMAPPING2_DIO5_10 (0x20)
431
#define SX127X_RF_LORA_DIOMAPPING2_DIO5_11 (0x30)
432
433
#define SX127X_RF_LORA_DIOMAPPING2_MAP_MASK (0xFE)
434
#define SX127X_RF_LORA_DIOMAPPING2_MAP_PREAMBLEDETECT (0x01)
435
#define SX127X_RF_LORA_DIOMAPPING2_MAP_RSSI (0x00)
/* Default */
436
437
/* RegPllHop */
438
#define SX127X_RF_LORA_PLLHOP_FASTHOP_MASK (0x7F)
439
#define SX127X_RF_LORA_PLLHOP_FASTHOP_ON (0x80)
440
#define SX127X_RF_LORA_PLLHOP_FASTHOP_OFF (0x00)
/* Default */
441
442
/* RegTcxo */
443
#define SX127X_RF_LORA_TCXO_TCXOINPUT_MASK (0xEF)
444
#define SX127X_RF_LORA_TCXO_TCXOINPUT_ON (0x10)
445
#define SX127X_RF_LORA_TCXO_TCXOINPUT_OFF (0x00)
/* Default */
446
447
/* RegPaDac */
448
#define SX127X_RF_LORA_PADAC_20DBM_MASK (0xF8)
449
#define SX127X_RF_LORA_PADAC_20DBM_ON (0x07)
450
#define SX127X_RF_LORA_PADAC_20DBM_OFF (0x04)
/* Default */
451
452
/* RegBitrateFrac */
453
#define RF_BITRATEFRAC_MASK (0xF0)
454
455
/* RegPll */
456
#define RF_PLL_BANDWIDTH_MASK (0x3F)
457
#define RF_PLL_BANDWIDTH_75 (0x00)
458
#define RF_PLL_BANDWIDTH_150 (0x40)
459
#define RF_PLL_BANDWIDTH_225 (0x80)
460
#define RF_PLL_BANDWIDTH_300 (0xC0)
/* Default */
462
463
/* FSK modem definitions */
464
469
#define SX127X_REG_FIFO (0x00)
470
471
/* Common settings */
472
#define SX127X_REG_OPMODE (0x01)
473
#define SX127X_REG_BITRATEMSB (0x02)
474
#define SX127X_REG_BITRATELSB (0x03)
475
#define SX127X_REG_FDEVMSB (0x04)
476
#define SX127X_REG_FDEVLSB (0x05)
477
#define SX127X_REG_FRFMSB (0x06)
478
#define SX127X_REG_FRFMID (0x07)
479
#define SX127X_REG_FRFLSB (0x08)
480
481
/* Tx settings */
482
#define SX127X_REG_PACONFIG (0x09)
483
#define SX127X_REG_PARAMP (0x0A)
484
#define SX127X_REG_OCP (0x0B)
485
486
/* Rx settings */
487
#define SX127X_REG_LNA (0x0C)
488
#define SX127X_REG_RXCONFIG (0x0D)
489
#define SX127X_REG_RSSICONFIG (0x0E)
490
#define SX127X_REG_RSSICOLLISION (0x0F)
491
#define SX127X_REG_RSSITHRESH (0x10)
492
#define SX127X_REG_RSSIVALUE (0x11)
493
#define SX127X_REG_RXBW (0x12)
494
#define SX127X_REG_AFCBW (0x13)
495
#define SX127X_REG_OOKPEAK (0x14)
496
#define SX127X_REG_OOKFIX (0x15)
497
#define SX127X_REG_OOKAVG (0x16)
498
#define SX127X_REG_RES17 (0x17)
499
#define SX127X_REG_RES18 (0x18)
500
#define SX127X_REG_RES19 (0x19)
501
#define SX127X_REG_AFCFEI (0x1A)
502
#define SX127X_REG_AFCMSB (0x1B)
503
#define SX127X_REG_AFCLSB (0x1C)
504
#define SX127X_REG_FEIMSB (0x1D)
505
#define SX127X_REG_FEILSB (0x1E)
506
#define SX127X_REG_PREAMBLEDETECT (0x1F)
507
#define SX127X_REG_RXTIMEOUT1 (0x20)
508
#define SX127X_REG_RXTIMEOUT2 (0x21)
509
#define SX127X_REG_RXTIMEOUT3 (0x22)
510
#define SX127X_REG_RXDELAY (0x23)
511
512
/* Oscillator settings */
513
#define SX127X_REG_OSC (0x24)
514
515
/* Packet handler settings */
516
#define SX127X_REG_PREAMBLEMSB (0x25)
517
#define SX127X_REG_PREAMBLELSB (0x26)
518
#define SX127X_REG_SYNCCONFIG (0x27)
519
#define SX127X_REG_SYNCVALUE1 (0x28)
520
#define SX127X_REG_SYNCVALUE2 (0x29)
521
#define SX127X_REG_SYNCVALUE3 (0x2A)
522
#define SX127X_REG_SYNCVALUE4 (0x2B)
523
#define SX127X_REG_SYNCVALUE5 (0x2C)
524
#define SX127X_REG_SYNCVALUE6 (0x2D)
525
#define SX127X_REG_SYNCVALUE7 (0x2E)
526
#define SX127X_REG_SYNCVALUE8 (0x2F)
527
#define SX127X_REG_PACKETCONFIG1 (0x30)
528
#define SX127X_REG_PACKETCONFIG2 (0x31)
529
#define SX127X_REG_PAYLOADLENGTH (0x32)
530
#define SX127X_REG_NODEADRS (0x33)
531
#define SX127X_REG_BROADCASTADRS (0x34)
532
#define SX127X_REG_FIFOTHRESH (0x35)
533
534
/* SM settings */
535
#define SX127X_REG_SEQCONFIG1 (0x36)
536
#define SX127X_REG_SEQCONFIG2 (0x37)
537
#define SX127X_REG_TIMERRESOL (0x38)
538
#define SX127X_REG_TIMER1COEF (0x39)
539
#define SX127X_REG_TIMER2COEF (0x3A)
540
541
/* Service settings */
542
#define SX127X_REG_IMAGECAL (0x3B)
543
#define SX127X_REG_TEMP (0x3C)
544
#define SX127X_REG_LOWBAT (0x3D)
545
546
/* Status */
547
#define SX127X_REG_IRQFLAGS1 (0x3E)
548
#define SX127X_REG_IRQFLAGS2 (0x3F)
549
550
/* I/O settings */
551
#define SX127X_REG_DIOMAPPING1 (0x40)
552
#define SX127X_REG_DIOMAPPING2 (0x41)
553
554
/* Version */
555
#define SX127X_REG_VERSION (0x42)
556
#define VERSION_SX1276 (0x12)
557
#define VERSION_SX1276_WLR089 (0x13)
558
#define VERSION_SX1272 (0x22)
559
560
/* Additional settings */
561
#define SX127X_REG_PLLHOP (0x44)
562
#define SX127X_REG_TCXO (0x4B)
563
#define SX1276_REG_PADAC (0x4D)
564
#define SX1272_REG_PADAC (0x5A)
565
#define SX127X_REG_FORMERTEMP (0x5B)
566
#define SX127X_REG_BITRATEFRAC (0x5D)
567
#define SX127X_REG_AGCREF (0x61)
568
#define SX127X_REG_AGCTHRESH1 (0x62)
569
#define SX127X_REG_AGCTHRESH2 (0x63)
570
#define SX127X_REG_AGCTHRESH3 (0x64)
571
#define SX127X_REG_PLL (0x70)
573
578
579
/* RegOpMode */
580
#define SX127X_RF_OPMODE_LONGRANGEMODE_MASK (0x7F)
581
#define SX127X_RF_OPMODE_LONGRANGEMODE_OFF (0x00)
582
#define SX127X_RF_OPMODE_LONGRANGEMODE_ON (0x80)
583
584
#define SX127X_RF_OPMODE_MODULATIONTYPE_MASK (0x9F)
585
#define SX127X_RF_OPMODE_MODULATIONTYPE_FSK (0x00)
/* Default */
586
#define SX127X_RF_OPMODE_MODULATIONTYPE_OOK (0x20)
587
588
#define SX127X_RF_OPMODE_MODULATIONSHAPING_MASK (0xE7)
589
#define SX127X_RF_OPMODE_MODULATIONSHAPING_00 (0x00)
/* Default */
590
#define SX127X_RF_OPMODE_MODULATIONSHAPING_01 (0x08)
591
#define SX127X_RF_OPMODE_MODULATIONSHAPING_10 (0x10)
592
#define SX127X_RF_OPMODE_MODULATIONSHAPING_11 (0x18)
593
594
#define SX127X_RF_OPMODE_MASK (0xF8)
595
#define SX127X_RF_OPMODE_SLEEP (0x00)
596
#define SX127X_RF_OPMODE_STANDBY (0x01)
/* Default */
597
#define SX127X_RF_OPMODE_SYNTHESIZER_TX (0x02)
598
#define SX127X_RF_OPMODE_TRANSMITTER (0x03)
599
#define SX127X_RF_OPMODE_SYNTHESIZER_RX (0x04)
600
#define SX127X_RF_OPMODE_RECEIVER (0x05)
601
#define SX127X_RF_OPMODE_RECEIVER_SINGLE (0x06)
602
603
/* RegBitRate (bits/sec) */
604
#define SX127X_RF_BITRATEMSB_1200_BPS (0x68)
605
#define SX127X_RF_BITRATELSB_1200_BPS (0x2B)
606
#define SX127X_RF_BITRATEMSB_2400_BPS (0x34)
607
#define SX127X_RF_BITRATELSB_2400_BPS (0x15)
608
#define SX127X_RF_BITRATEMSB_4800_BPS (0x1A)
/* Default */
609
#define SX127X_RF_BITRATELSB_4800_BPS (0x0B)
/* Default */
610
#define SX127X_RF_BITRATEMSB_9600_BPS (0x0D)
611
#define SX127X_RF_BITRATELSB_9600_BPS (0x05)
612
#define SX127X_RF_BITRATEMSB_15000_BPS (0x08)
613
#define SX127X_RF_BITRATELSB_15000_BPS (0x55)
614
#define SX127X_RF_BITRATEMSB_19200_BPS (0x06)
615
#define SX127X_RF_BITRATELSB_19200_BPS (0x83)
616
#define SX127X_RF_BITRATEMSB_38400_BPS (0x03)
617
#define SX127X_RF_BITRATELSB_38400_BPS (0x41)
618
#define SX127X_RF_BITRATEMSB_76800_BPS (0x01)
619
#define SX127X_RF_BITRATELSB_76800_BPS (0xA1)
620
#define SX127X_RF_BITRATEMSB_153600_BPS (0x00)
621
#define SX127X_RF_BITRATELSB_153600_BPS (0xD0)
622
#define SX127X_RF_BITRATEMSB_57600_BPS (0x02)
623
#define SX127X_RF_BITRATELSB_57600_BPS (0x2C)
624
#define SX127X_RF_BITRATEMSB_115200_BPS (0x01)
625
#define SX127X_RF_BITRATELSB_115200_BPS (0x16)
626
#define SX127X_RF_BITRATEMSB_12500_BPS (0x0A)
627
#define SX127X_RF_BITRATELSB_12500_BPS (0x00)
628
#define SX127X_RF_BITRATEMSB_25000_BPS (0x05)
629
#define SX127X_RF_BITRATELSB_25000_BPS (0x00)
630
#define SX127X_RF_BITRATEMSB_50000_BPS (0x02)
631
#define SX127X_RF_BITRATELSB_50000_BPS (0x80)
632
#define SX127X_RF_BITRATEMSB_100000_BPS (0x01)
633
#define SX127X_RF_BITRATELSB_100000_BPS (0x40)
634
#define SX127X_RF_BITRATEMSB_150000_BPS (0x00)
635
#define SX127X_RF_BITRATELSB_150000_BPS (0xD5)
636
#define SX127X_RF_BITRATEMSB_200000_BPS (0x00)
637
#define SX127X_RF_BITRATELSB_200000_BPS (0xA0)
638
#define SX127X_RF_BITRATEMSB_250000_BPS (0x00)
639
#define SX127X_RF_BITRATELSB_250000_BPS (0x80)
640
#define SX127X_RF_BITRATEMSB_32768_BPS (0x03)
641
#define SX127X_RF_BITRATELSB_32768_BPS (0xD1)
642
643
/* RegFdev (Hz) */
644
#define SX127X_RF_FDEVMSB_2000_HZ (0x00)
645
#define SX127X_RF_FDEVLSB_2000_HZ (0x21)
646
#define SX127X_RF_FDEVMSB_5000_HZ (0x00)
/* Default */
647
#define SX127X_RF_FDEVLSB_5000_HZ (0x52)
/* Default */
648
#define SX127X_RF_FDEVMSB_10000_HZ (0x00)
649
#define SX127X_RF_FDEVLSB_10000_HZ (0xA4)
650
#define SX127X_RF_FDEVMSB_15000_HZ (0x00)
651
#define SX127X_RF_FDEVLSB_15000_HZ (0xF6)
652
#define SX127X_RF_FDEVMSB_20000_HZ (0x01)
653
#define SX127X_RF_FDEVLSB_20000_HZ (0x48)
654
#define SX127X_RF_FDEVMSB_25000_HZ (0x01)
655
#define SX127X_RF_FDEVLSB_25000_HZ (0x9A)
656
#define SX127X_RF_FDEVMSB_30000_HZ (0x01)
657
#define SX127X_RF_FDEVLSB_30000_HZ (0xEC)
658
#define SX127X_RF_FDEVMSB_35000_HZ (0x02)
659
#define SX127X_RF_FDEVLSB_35000_HZ (0x3D)
660
#define SX127X_RF_FDEVMSB_40000_HZ (0x02)
661
#define SX127X_RF_FDEVLSB_40000_HZ (0x8F)
662
#define SX127X_RF_FDEVMSB_45000_HZ (0x02)
663
#define SX127X_RF_FDEVLSB_45000_HZ (0xE1)
664
#define SX127X_RF_FDEVMSB_50000_HZ (0x03)
665
#define SX127X_RF_FDEVLSB_50000_HZ (0x33)
666
#define SX127X_RF_FDEVMSB_55000_HZ (0x03)
667
#define SX127X_RF_FDEVLSB_55000_HZ (0x85)
668
#define SX127X_RF_FDEVMSB_60000_HZ (0x03)
669
#define SX127X_RF_FDEVLSB_60000_HZ (0xD7)
670
#define SX127X_RF_FDEVMSB_65000_HZ (0x04)
671
#define SX127X_RF_FDEVLSB_65000_HZ (0x29)
672
#define SX127X_RF_FDEVMSB_70000_HZ (0x04)
673
#define SX127X_RF_FDEVLSB_70000_HZ (0x7B)
674
#define SX127X_RF_FDEVMSB_75000_HZ (0x04)
675
#define SX127X_RF_FDEVLSB_75000_HZ (0xCD)
676
#define SX127X_RF_FDEVMSB_80000_HZ (0x05)
677
#define SX127X_RF_FDEVLSB_80000_HZ (0x1F)
678
#define SX127X_RF_FDEVMSB_85000_HZ (0x05)
679
#define SX127X_RF_FDEVLSB_85000_HZ (0x71)
680
#define SX127X_RF_FDEVMSB_90000_HZ (0x05)
681
#define SX127X_RF_FDEVLSB_90000_HZ (0xC3)
682
#define SX127X_RF_FDEVMSB_95000_HZ (0x06)
683
#define SX127X_RF_FDEVLSB_95000_HZ (0x14)
684
#define SX127X_RF_FDEVMSB_100000_HZ (0x06)
685
#define SX127X_RF_FDEVLSB_100000_HZ (0x66)
686
#define SX127X_RF_FDEVMSB_110000_HZ (0x07)
687
#define SX127X_RF_FDEVLSB_110000_HZ (0x0A)
688
#define SX127X_RF_FDEVMSB_120000_HZ (0x07)
689
#define SX127X_RF_FDEVLSB_120000_HZ (0xAE)
690
#define SX127X_RF_FDEVMSB_130000_HZ (0x08)
691
#define SX127X_RF_FDEVLSB_130000_HZ (0x52)
692
#define SX127X_RF_FDEVMSB_140000_HZ (0x08)
693
#define SX127X_RF_FDEVLSB_140000_HZ (0xF6)
694
#define SX127X_RF_FDEVMSB_150000_HZ (0x09)
695
#define SX127X_RF_FDEVLSB_150000_HZ (0x9A)
696
#define SX127X_RF_FDEVMSB_160000_HZ (0x0A)
697
#define SX127X_RF_FDEVLSB_160000_HZ (0x3D)
698
#define SX127X_RF_FDEVMSB_170000_HZ (0x0A)
699
#define SX127X_RF_FDEVLSB_170000_HZ (0xE1)
700
#define SX127X_RF_FDEVMSB_180000_HZ (0x0B)
701
#define SX127X_RF_FDEVLSB_180000_HZ (0x85)
702
#define SX127X_RF_FDEVMSB_190000_HZ (0x0C)
703
#define SX127X_RF_FDEVLSB_190000_HZ (0x29)
704
#define SX127X_RF_FDEVMSB_200000_HZ (0x0C)
705
#define SX127X_RF_FDEVLSB_200000_HZ (0xCD)
706
707
/* RegFrf (MHz) */
708
#define SX127X_RF_FRFMSB_863_MHZ (0xD7)
709
#define SX127X_RF_FRFMID_863_MHZ (0xC0)
710
#define SX127X_RF_FRFLSB_863_MHZ (0x00)
711
#define SX127X_RF_FRFMSB_864_MHZ (0xD8)
712
#define SX127X_RF_FRFMID_864_MHZ (0x00)
713
#define SX127X_RF_FRFLSB_864_MHZ (0x00)
714
#define SX127X_RF_FRFMSB_865_MHZ (0xD8)
715
#define SX127X_RF_FRFMID_865_MHZ (0x40)
716
#define SX127X_RF_FRFLSB_865_MHZ (0x00)
717
#define SX127X_RF_FRFMSB_866_MHZ (0xD8)
718
#define SX127X_RF_FRFMID_866_MHZ (0x80)
719
#define SX127X_RF_FRFLSB_866_MHZ (0x00)
720
#define SX127X_RF_FRFMSB_867_MHZ (0xD8)
721
#define SX127X_RF_FRFMID_867_MHZ (0xC0)
722
#define SX127X_RF_FRFLSB_867_MHZ (0x00)
723
#define SX127X_RF_FRFMSB_868_MHZ (0xD9)
724
#define SX127X_RF_FRFMID_868_MHZ (0x00)
725
#define SX127X_RF_FRFLSB_868_MHZ (0x00)
726
#define SX127X_RF_FRFMSB_869_MHZ (0xD9)
727
#define SX127X_RF_FRFMID_869_MHZ (0x40)
728
#define SX127X_RF_FRFLSB_869_MHZ (0x00)
729
#define SX127X_RF_FRFMSB_870_MHZ (0xD9)
730
#define SX127X_RF_FRFMID_870_MHZ (0x80)
731
#define SX127X_RF_FRFLSB_870_MHZ (0x00)
732
733
#define SX127X_RF_FRFMSB_902_MHZ (0xE1)
734
#define SX127X_RF_FRFMID_902_MHZ (0x80)
735
#define SX127X_RF_FRFLSB_902_MHZ (0x00)
736
#define SX127X_RF_FRFMSB_903_MHZ (0xE1)
737
#define SX127X_RF_FRFMID_903_MHZ (0xC0)
738
#define SX127X_RF_FRFLSB_903_MHZ (0x00)
739
#define SX127X_RF_FRFMSB_904_MHZ (0xE2)
740
#define SX127X_RF_FRFMID_904_MHZ (0x00)
741
#define SX127X_RF_FRFLSB_904_MHZ (0x00)
742
#define SX127X_RF_FRFMSB_905_MHZ (0xE2)
743
#define SX127X_RF_FRFMID_905_MHZ (0x40)
744
#define SX127X_RF_FRFLSB_905_MHZ (0x00)
745
#define SX127X_RF_FRFMSB_906_MHZ (0xE2)
746
#define SX127X_RF_FRFMID_906_MHZ (0x80)
747
#define SX127X_RF_FRFLSB_906_MHZ (0x00)
748
#define SX127X_RF_FRFMSB_907_MHZ (0xE2)
749
#define SX127X_RF_FRFMID_907_MHZ (0xC0)
750
#define SX127X_RF_FRFLSB_907_MHZ (0x00)
751
#define SX127X_RF_FRFMSB_908_MHZ (0xE3)
752
#define SX127X_RF_FRFMID_908_MHZ (0x00)
753
#define SX127X_RF_FRFLSB_908_MHZ (0x00)
754
#define SX127X_RF_FRFMSB_909_MHZ (0xE3)
755
#define SX127X_RF_FRFMID_909_MHZ (0x40)
756
#define SX127X_RF_FRFLSB_909_MHZ (0x00)
757
#define SX127X_RF_FRFMSB_910_MHZ (0xE3)
758
#define SX127X_RF_FRFMID_910_MHZ (0x80)
759
#define SX127X_RF_FRFLSB_910_MHZ (0x00)
760
#define SX127X_RF_FRFMSB_911_MHZ (0xE3)
761
#define SX127X_RF_FRFMID_911_MHZ (0xC0)
762
#define SX127X_RF_FRFLSB_911_MHZ (0x00)
763
#define SX127X_RF_FRFMSB_912_MHZ (0xE4)
764
#define SX127X_RF_FRFMID_912_MHZ (0x00)
765
#define SX127X_RF_FRFLSB_912_MHZ (0x00)
766
#define SX127X_RF_FRFMSB_913_MHZ (0xE4)
767
#define SX127X_RF_FRFMID_913_MHZ (0x40)
768
#define SX127X_RF_FRFLSB_913_MHZ (0x00)
769
#define SX127X_RF_FRFMSB_914_MHZ (0xE4)
770
#define SX127X_RF_FRFMID_914_MHZ (0x80)
771
#define SX127X_RF_FRFLSB_914_MHZ (0x00)
772
#define SX127X_RF_FRFMSB_915_MHZ (0xE4)
/* Default */
773
#define SX127X_RF_FRFMID_915_MHZ (0xC0)
/* Default */
774
#define SX127X_RF_FRFLSB_915_MHZ (0x00)
/* Default */
775
#define SX127X_RF_FRFMSB_916_MHZ (0xE5)
776
#define SX127X_RF_FRFMID_916_MHZ (0x00)
777
#define SX127X_RF_FRFLSB_916_MHZ (0x00)
778
#define SX127X_RF_FRFMSB_917_MHZ (0xE5)
779
#define SX127X_RF_FRFMID_917_MHZ (0x40)
780
#define SX127X_RF_FRFLSB_917_MHZ (0x00)
781
#define SX127X_RF_FRFMSB_918_MHZ (0xE5)
782
#define SX127X_RF_FRFMID_918_MHZ (0x80)
783
#define SX127X_RF_FRFLSB_918_MHZ (0x00)
784
#define SX127X_RF_FRFMSB_919_MHZ (0xE5)
785
#define SX127X_RF_FRFMID_919_MHZ (0xC0)
786
#define SX127X_RF_FRFLSB_919_MHZ (0x00)
787
#define SX127X_RF_FRFMSB_920_MHZ (0xE6)
788
#define SX127X_RF_FRFMID_920_MHZ (0x00)
789
#define SX127X_RF_FRFLSB_920_MHZ (0x00)
790
#define SX127X_RF_FRFMSB_921_MHZ (0xE6)
791
#define SX127X_RF_FRFMID_921_MHZ (0x40)
792
#define SX127X_RF_FRFLSB_921_MHZ (0x00)
793
#define SX127X_RF_FRFMSB_922_MHZ (0xE6)
794
#define SX127X_RF_FRFMID_922_MHZ (0x80)
795
#define SX127X_RF_FRFLSB_922_MHZ (0x00)
796
#define SX127X_RF_FRFMSB_923_MHZ (0xE6)
797
#define SX127X_RF_FRFMID_923_MHZ (0xC0)
798
#define SX127X_RF_FRFLSB_923_MHZ (0x00)
799
#define SX127X_RF_FRFMSB_924_MHZ (0xE7)
800
#define SX127X_RF_FRFMID_924_MHZ (0x00)
801
#define SX127X_RF_FRFLSB_924_MHZ (0x00)
802
#define SX127X_RF_FRFMSB_925_MHZ (0xE7)
803
#define SX127X_RF_FRFMID_925_MHZ (0x40)
804
#define SX127X_RF_FRFLSB_925_MHZ (0x00)
805
#define SX127X_RF_FRFMSB_926_MHZ (0xE7)
806
#define SX127X_RF_FRFMID_926_MHZ (0x80)
807
#define SX127X_RF_FRFLSB_926_MHZ (0x00)
808
#define SX127X_RF_FRFMSB_927_MHZ (0xE7)
809
#define SX127X_RF_FRFMID_927_MHZ (0xC0)
810
#define SX127X_RF_FRFLSB_927_MHZ (0x00)
811
#define SX127X_RF_FRFMSB_928_MHZ (0xE8)
812
#define SX127X_RF_FRFMID_928_MHZ (0x00)
813
#define SX127X_RF_FRFLSB_928_MHZ (0x00)
814
815
/* RegPaConfig */
816
#define SX127X_RF_PACONFIG_PASELECT_MASK (0x7F)
817
#define SX127X_RF_PACONFIG_PASELECT_PABOOST (0x80)
818
#define SX127X_RF_PACONFIG_PASELECT_RFO (0x00)
/* Default */
819
820
#define SX127X_RF_PACONFIG_MAX_POWER_MASK (0x8F)
821
822
#define SX127X_RF_PACONFIG_OUTPUTPOWER_MASK (0xF0)
823
824
/* RegPaRamp */
825
#define SX127X_RF_PARAMP_LOWPNTXPLL_MASK (0xE0)
826
#define SX127X_RF_PARAMP_LOWPNTXPLL_OFF (0x10)
/* Default */
827
#define SX127X_RF_PARAMP_LOWPNTXPLL_ON (0x00)
828
829
#define SX127X_RF_PARAMP_MASK (0xF0)
830
#define SX127X_RF_PARAMP_3400_US (0x00)
831
#define SX127X_RF_PARAMP_2000_US (0x01)
832
#define SX127X_RF_PARAMP_1000_US (0x02)
833
#define SX127X_RF_PARAMP_0500_US (0x03)
834
#define SX127X_RF_PARAMP_0250_US (0x04)
835
#define SX127X_RF_PARAMP_0125_US (0x05)
836
#define SX127X_RF_PARAMP_0100_US (0x06)
837
#define SX127X_RF_PARAMP_0062_US (0x07)
838
#define SX127X_RF_PARAMP_0050_US (0x08)
839
#define SX127X_RF_PARAMP_0040_US (0x09)
/* Default */
840
#define SX127X_RF_PARAMP_0031_US (0x0A)
841
#define SX127X_RF_PARAMP_0025_US (0x0B)
842
#define SX127X_RF_PARAMP_0020_US (0x0C)
843
#define SX127X_RF_PARAMP_0015_US (0x0D)
844
#define SX127X_RF_PARAMP_0012_US (0x0E)
845
#define SX127X_RF_PARAMP_0010_US (0x0F)
846
847
/* RegOcp */
848
#define SX127X_RF_OCP_MASK (0xDF)
849
#define SX127X_RF_OCP_ON (0x20)
/* Default */
850
#define SX127X_RF_OCP_OFF (0x00)
851
852
#define SX127X_RF_OCP_TRIM_MASK (0xE0)
853
#define SX127X_RF_OCP_TRIM_045_MA (0x00)
854
#define SX127X_RF_OCP_TRIM_050_MA (0x01)
855
#define SX127X_RF_OCP_TRIM_055_MA (0x02)
856
#define SX127X_RF_OCP_TRIM_060_MA (0x03)
857
#define SX127X_RF_OCP_TRIM_065_MA (0x04)
858
#define SX127X_RF_OCP_TRIM_070_MA (0x05)
859
#define SX127X_RF_OCP_TRIM_075_MA (0x06)
860
#define SX127X_RF_OCP_TRIM_080_MA (0x07)
861
#define SX127X_RF_OCP_TRIM_085_MA (0x08)
862
#define SX127X_RF_OCP_TRIM_090_MA (0x09)
863
#define SX127X_RF_OCP_TRIM_095_MA (0x0A)
864
#define SX127X_RF_OCP_TRIM_100_MA (0x0B)
/* Default */
865
#define SX127X_RF_OCP_TRIM_105_MA (0x0C)
866
#define SX127X_RF_OCP_TRIM_110_MA (0x0D)
867
#define SX127X_RF_OCP_TRIM_115_MA (0x0E)
868
#define SX127X_RF_OCP_TRIM_120_MA (0x0F)
869
#define SX127X_RF_OCP_TRIM_130_MA (0x10)
870
#define SX127X_RF_OCP_TRIM_140_MA (0x11)
871
#define SX127X_RF_OCP_TRIM_150_MA (0x12)
872
#define SX127X_RF_OCP_TRIM_160_MA (0x13)
873
#define SX127X_RF_OCP_TRIM_170_MA (0x14)
874
#define SX127X_RF_OCP_TRIM_180_MA (0x15)
875
#define SX127X_RF_OCP_TRIM_190_MA (0x16)
876
#define SX127X_RF_OCP_TRIM_200_MA (0x17)
877
#define SX127X_RF_OCP_TRIM_210_MA (0x18)
878
#define SX127X_RF_OCP_TRIM_220_MA (0x19)
879
#define SX127X_RF_OCP_TRIM_230_MA (0x1A)
880
#define SX127X_RF_OCP_TRIM_240_MA (0x1B)
881
882
/* RegLna */
883
#define SX127X_RF_LNA_GAIN_MASK (0x1F)
884
#define SX127X_RF_LNA_GAIN_G1 (0x20)
/* Default */
885
#define SX127X_RF_LNA_GAIN_G2 (0x40)
886
#define SX127X_RF_LNA_GAIN_G3 (0x60)
887
#define SX127X_RF_LNA_GAIN_G4 (0x80)
888
#define SX127X_RF_LNA_GAIN_G5 (0xA0)
889
#define SX127X_RF_LNA_GAIN_G6 (0xC0)
890
891
#define SX127X_RF_LNA_BOOST_MASK (0xFC)
892
#define SX127X_RF_LNA_BOOST_OFF (0x00)
/* Default */
893
#define SX127X_RF_LNA_BOOST_ON (0x03)
894
895
/* RegRxConfig */
896
#define SX127X_RF_RXCONFIG_RESTARTRXONCOLLISION_MASK (0x7F)
897
#define SX127X_RF_RXCONFIG_RESTARTRXONCOLLISION_ON (0x80)
898
#define SX127X_RF_RXCONFIG_RESTARTRXONCOLLISION_OFF (0x00)
/* Default */
899
900
#define SX127X_RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK (0x40)
/* Write only */
901
902
#define SX127X_RF_RXCONFIG_RESTARTRXWITHPLLLOCK (0x20)
/* Write only */
903
904
#define SX127X_RF_RXCONFIG_AFCAUTO_MASK (0xEF)
905
#define SX127X_RF_RXCONFIG_AFCAUTO_ON (0x10)
906
#define SX127X_RF_RXCONFIG_AFCAUTO_OFF (0x00)
/* Default */
907
908
#define SX127X_RF_RXCONFIG_AGCAUTO_MASK (0xF7)
909
#define SX127X_RF_RXCONFIG_AGCAUTO_ON (0x08)
/* Default */
910
#define SX127X_RF_RXCONFIG_AGCAUTO_OFF (0x00)
911
912
#define SX127X_RF_RXCONFIG_RXTRIGER_MASK (0xF8)
913
#define SX127X_RF_RXCONFIG_RXTRIGER_OFF (0x00)
914
#define SX127X_RF_RXCONFIG_RXTRIGER_RSSI (0x01)
915
#define SX127X_RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT (0x06)
/* Default */
916
#define SX127X_RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT (0x07)
917
918
/* RegRssiConfig */
919
#define SX127X_RF_RSSICONFIG_OFFSET_MASK (0x07)
920
#define SX127X_RF_RSSICONFIG_OFFSET_P_00_DB (0x00)
/* Default */
921
#define SX127X_RF_RSSICONFIG_OFFSET_P_01_DB (0x08)
922
#define SX127X_RF_RSSICONFIG_OFFSET_P_02_DB (0x10)
923
#define SX127X_RF_RSSICONFIG_OFFSET_P_03_DB (0x18)
924
#define SX127X_RF_RSSICONFIG_OFFSET_P_04_DB (0x20)
925
#define SX127X_RF_RSSICONFIG_OFFSET_P_05_DB (0x28)
926
#define SX127X_RF_RSSICONFIG_OFFSET_P_06_DB (0x30)
927
#define SX127X_RF_RSSICONFIG_OFFSET_P_07_DB (0x38)
928
#define SX127X_RF_RSSICONFIG_OFFSET_P_08_DB (0x40)
929
#define SX127X_RF_RSSICONFIG_OFFSET_P_09_DB (0x48)
930
#define SX127X_RF_RSSICONFIG_OFFSET_P_10_DB (0x50)
931
#define SX127X_RF_RSSICONFIG_OFFSET_P_11_DB (0x58)
932
#define SX127X_RF_RSSICONFIG_OFFSET_P_12_DB (0x60)
933
#define SX127X_RF_RSSICONFIG_OFFSET_P_13_DB (0x68)
934
#define SX127X_RF_RSSICONFIG_OFFSET_P_14_DB (0x70)
935
#define SX127X_RF_RSSICONFIG_OFFSET_P_15_DB (0x78)
936
#define SX127X_RF_RSSICONFIG_OFFSET_M_16_DB (0x80)
937
#define SX127X_RF_RSSICONFIG_OFFSET_M_15_DB (0x88)
938
#define SX127X_RF_RSSICONFIG_OFFSET_M_14_DB (0x90)
939
#define SX127X_RF_RSSICONFIG_OFFSET_M_13_DB (0x98)
940
#define SX127X_RF_RSSICONFIG_OFFSET_M_12_DB (0xA0)
941
#define SX127X_RF_RSSICONFIG_OFFSET_M_11_DB (0xA8)
942
#define SX127X_RF_RSSICONFIG_OFFSET_M_10_DB (0xB0)
943
#define SX127X_RF_RSSICONFIG_OFFSET_M_09_DB (0xB8)
944
#define SX127X_RF_RSSICONFIG_OFFSET_M_08_DB (0xC0)
945
#define SX127X_RF_RSSICONFIG_OFFSET_M_07_DB (0xC8)
946
#define SX127X_RF_RSSICONFIG_OFFSET_M_06_DB (0xD0)
947
#define SX127X_RF_RSSICONFIG_OFFSET_M_05_DB (0xD8)
948
#define SX127X_RF_RSSICONFIG_OFFSET_M_04_DB (0xE0)
949
#define SX127X_RF_RSSICONFIG_OFFSET_M_03_DB (0xE8)
950
#define SX127X_RF_RSSICONFIG_OFFSET_M_02_DB (0xF0)
951
#define SX127X_RF_RSSICONFIG_OFFSET_M_01_DB (0xF8)
952
953
#define SX127X_RF_RSSICONFIG_SMOOTHING_MASK (0xF8)
954
#define SX127X_RF_RSSICONFIG_SMOOTHING_2 (0x00)
955
#define SX127X_RF_RSSICONFIG_SMOOTHING_4 (0x01)
956
#define SX127X_RF_RSSICONFIG_SMOOTHING_8 (0x02)
/* Default */
957
#define SX127X_RF_RSSICONFIG_SMOOTHING_16 (0x03)
958
#define SX127X_RF_RSSICONFIG_SMOOTHING_32 (0x04)
959
#define SX127X_RF_RSSICONFIG_SMOOTHING_64 (0x05)
960
#define SX127X_RF_RSSICONFIG_SMOOTHING_128 (0x06)
961
#define SX127X_RF_RSSICONFIG_SMOOTHING_256 (0x07)
962
963
/* RegRssiCollision */
964
#define SX127X_RF_RSSICOLISION_THRESHOLD (0x0A)
/* Default */
965
966
/* RegRssiThresh */
967
#define SX127X_RF_RSSITHRESH_THRESHOLD (0xFF)
/* Default */
968
969
/* RegRxBw */
970
#define SX127X_RF_RXBW_MANT_MASK (0xE7)
971
#define SX127X_RF_RXBW_MANT_16 (0x00)
972
#define SX127X_RF_RXBW_MANT_20 (0x08)
973
#define SX127X_RF_RXBW_MANT_24 (0x10)
/* Default */
974
975
#define SX127X_RF_RXBW_EXP_MASK (0xF8)
976
#define SX127X_RF_RXBW_EXP_0 (0x00)
977
#define SX127X_RF_RXBW_EXP_1 (0x01)
978
#define SX127X_RF_RXBW_EXP_2 (0x02)
979
#define SX127X_RF_RXBW_EXP_3 (0x03)
980
#define SX127X_RF_RXBW_EXP_4 (0x04)
981
#define SX127X_RF_RXBW_EXP_5 (0x05)
/* Default */
982
#define SX127X_RF_RXBW_EXP_6 (0x06)
983
#define SX127X_RF_RXBW_EXP_7 (0x07)
984
985
/* RegAfcBw */
986
#define SX127X_RF_AFCBW_MANTAFC_MASK (0xE7)
987
#define SX127X_RF_AFCBW_MANTAFC_16 (0x00)
988
#define SX127X_RF_AFCBW_MANTAFC_20 (0x08)
/* Default */
989
#define SX127X_RF_AFCBW_MANTAFC_24 (0x10)
990
991
#define SX127X_RF_AFCBW_EXPAFC_MASK (0xF8)
992
#define SX127X_RF_AFCBW_EXPAFC_0 (0x00)
993
#define SX127X_RF_AFCBW_EXPAFC_1 (0x01)
994
#define SX127X_RF_AFCBW_EXPAFC_2 (0x02)
995
#define SX127X_RF_AFCBW_EXPAFC_3 (0x03)
/* Default */
996
#define SX127X_RF_AFCBW_EXPAFC_4 (0x04)
997
#define SX127X_RF_AFCBW_EXPAFC_5 (0x05)
998
#define SX127X_RF_AFCBW_EXPAFC_6 (0x06)
999
#define SX127X_RF_AFCBW_EXPAFC_7 (0x07)
1000
1001
/* RegOokPeak */
1002
#define SX127X_RF_OOKPEAK_BITSYNC_MASK (0xDF)
/* Default */
1003
#define SX127X_RF_OOKPEAK_BITSYNC_ON (0x20)
/* Default */
1004
#define SX127X_RF_OOKPEAK_BITSYNC_OFF (0x00)
1005
1006
#define SX127X_RF_OOKPEAK_OOKTHRESHTYPE_MASK (0xE7)
1007
#define SX127X_RF_OOKPEAK_OOKTHRESHTYPE_FIXED (0x00)
1008
#define SX127X_RF_OOKPEAK_OOKTHRESHTYPE_PEAK (0x08)
/* Default */
1009
#define SX127X_RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE (0x10)
1010
1011
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK (0xF8)
1012
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB (0x00)
/* Default */
1013
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB (0x01)
1014
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB (0x02)
1015
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB (0x03)
1016
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB (0x04)
1017
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB (0x05)
1018
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB (0x06)
1019
#define SX127X_RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB (0x07)
1020
1021
/* RegOokFix */
1022
#define SX127X_RF_OOKFIX_OOKFIXEDTHRESHOLD (0x0C)
/* Default */
1023
1024
/* RegOokAvg */
1025
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_MASK (0x1F)
1026
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_000 (0x00)
/* Default */
1027
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_001 (0x20)
1028
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_010 (0x40)
1029
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_011 (0x60)
1030
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_100 (0x80)
1031
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_101 (0xA0)
1032
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_110 (0xC0)
1033
#define SX127X_RF_OOKAVG_OOKPEAKTHRESHDEC_111 (0xE0)
1034
1035
#define SX127X_RF_OOKAVG_AVERAGEOFFSET_MASK (0xF3)
1036
#define SX127X_RF_OOKAVG_AVERAGEOFFSET_0_DB (0x00)
/* Default */
1037
#define SX127X_RF_OOKAVG_AVERAGEOFFSET_2_DB (0x04)
1038
#define SX127X_RF_OOKAVG_AVERAGEOFFSET_4_DB (0x08)
1039
#define SX127X_RF_OOKAVG_AVERAGEOFFSET_6_DB (0x0C)
1040
1041
#define SX127X_RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK (0xFC)
1042
#define SX127X_RF_OOKAVG_OOKAVERAGETHRESHFILT_00 (0x00)
1043
#define SX127X_RF_OOKAVG_OOKAVERAGETHRESHFILT_01 (0x01)
1044
#define SX127X_RF_OOKAVG_OOKAVERAGETHRESHFILT_10 (0x02)
/* Default */
1045
#define SX127X_RF_OOKAVG_OOKAVERAGETHRESHFILT_11 (0x03)
1046
1047
/* RegAfcFei */
1048
#define SX127X_RF_AFCFEI_AGCSTART (0x10)
1049
1050
#define SX127X_RF_AFCFEI_AFCCLEAR (0x02)
1051
1052
#define SX127X_RF_AFCFEI_AFCAUTOCLEAR_MASK (0xFE)
1053
#define SX127X_RF_AFCFEI_AFCAUTOCLEAR_ON (0x01)
1054
#define SX127X_RF_AFCFEI_AFCAUTOCLEAR_OFF (0x00)
/* Default */
1055
1056
/* RegPreambleDetect */
1057
#define SX127X_RF_PREAMBLEDETECT_DETECTOR_MASK (0x7F)
1058
#define SX127X_RF_PREAMBLEDETECT_DETECTOR_ON (0x80)
/* Default */
1059
#define SX127X_RF_PREAMBLEDETECT_DETECTOR_OFF (0x00)
1060
1061
#define SX127X_RF_PREAMBLEDETECT_DETECTORSIZE_MASK (0x9F)
1062
#define SX127X_RF_PREAMBLEDETECT_DETECTORSIZE_1 (0x00)
1063
#define SX127X_RF_PREAMBLEDETECT_DETECTORSIZE_2 (0x20)
/* Default */
1064
#define SX127X_RF_PREAMBLEDETECT_DETECTORSIZE_3 (0x40)
1065
#define SX127X_RF_PREAMBLEDETECT_DETECTORSIZE_4 (0x60)
1066
1067
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_MASK (0xE0)
1068
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_0 (0x00)
1069
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_1 (0x01)
1070
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_2 (0x02)
1071
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_3 (0x03)
1072
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_4 (0x04)
1073
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_5 (0x05)
1074
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_6 (0x06)
1075
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_7 (0x07)
1076
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_8 (0x08)
1077
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_9 (0x09)
1078
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_10 (0x0A)
/* Default */
1079
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_11 (0x0B)
1080
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_12 (0x0C)
1081
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_13 (0x0D)
1082
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_14 (0x0E)
1083
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_15 (0x0F)
1084
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_16 (0x10)
1085
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_17 (0x11)
1086
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_18 (0x12)
1087
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_19 (0x13)
1088
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_20 (0x14)
1089
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_21 (0x15)
1090
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_22 (0x16)
1091
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_23 (0x17)
1092
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_24 (0x18)
1093
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_25 (0x19)
1094
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_26 (0x1A)
1095
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_27 (0x1B)
1096
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_28 (0x1C)
1097
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_29 (0x1D)
1098
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_30 (0x1E)
1099
#define SX127X_RF_PREAMBLEDETECT_DETECTORTOL_31 (0x1F)
1100
1101
/* RegRxTimeout1 */
1102
#define SX127X_RF_RXTIMEOUT1_TIMEOUTRXRSSI (0x00)
/* Default */
1103
1104
/* RegRxTimeout2 */
1105
#define SX127X_RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE (0x00)
/* Default */
1106
1107
/* RegRxTimeout3 */
1108
#define SX127X_RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC (0x00)
/* Default */
1109
1110
/* RegRxDelay */
1111
#define SX127X_RF_RXDELAY_INTERPACKETRXDELAY (0x00)
/* Default */
1112
1113
/* RegOsc */
1114
#define SX127X_RF_OSC_RCCALSTART (0x08)
1115
1116
#define SX127X_RF_OSC_CLKOUT_MASK (0xF8)
1117
#define SX127X_RF_OSC_CLKOUT_32_MHZ (0x00)
1118
#define SX127X_RF_OSC_CLKOUT_16_MHZ (0x01)
1119
#define SX127X_RF_OSC_CLKOUT_8_MHZ (0x02)
1120
#define SX127X_RF_OSC_CLKOUT_4_MHZ (0x03)
1121
#define SX127X_RF_OSC_CLKOUT_2_MHZ (0x04)
1122
#define SX127X_RF_OSC_CLKOUT_1_MHZ (0x05)
/* Default */
1123
#define SX127X_RF_OSC_CLKOUT_RC (0x06)
1124
#define SX127X_RF_OSC_CLKOUT_OFF (0x07)
1125
1126
/* RegPreambleMsb/RegPreambleLsb */
1127
#define SX127X_RF_PREAMBLEMSB_SIZE (0x00)
/* Default */
1128
#define SX127X_RF_PREAMBLELSB_SIZE (0x03)
/* Default */
1129
1130
/* RegSyncConfig */
1131
#define SX127X_RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK (0x3F)
1132
#define SX127X_RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON (0x80)
/* Default */
1133
#define SX127X_RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF (0x40)
1134
#define SX127X_RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF (0x00)
1135
1136
#define SX127X_RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK (0xDF)
1137
#define SX127X_RF_SYNCCONFIG_PREAMBLEPOLARITY_55 (0x20)
1138
#define SX127X_RF_SYNCCONFIG_PREAMBLEPOLARITY_AA (0x00)
/* Default */
1139
1140
#define SX127X_RF_SYNCCONFIG_SYNC_MASK (0xEF)
1141
#define SX127X_RF_SYNCCONFIG_SYNC_ON (0x10)
/* Default */
1142
#define SX127X_RF_SYNCCONFIG_SYNC_OFF (0x00)
1143
1144
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_MASK (0xF8)
1145
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_1 (0x00)
1146
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_2 (0x01)
1147
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_3 (0x02)
1148
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_4 (0x03)
/* Default */
1149
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_5 (0x04)
1150
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_6 (0x05)
1151
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_7 (0x06)
1152
#define SX127X_RF_SYNCCONFIG_SYNCSIZE_8 (0x07)
1153
1154
/* RegSyncValue1-8 */
1155
#define SX127X_RF_SYNCVALUE1_SYNCVALUE (0x01)
/* Default */
1156
#define SX127X_RF_SYNCVALUE2_SYNCVALUE (0x01)
/* Default */
1157
#define SX127X_RF_SYNCVALUE3_SYNCVALUE (0x01)
/* Default */
1158
#define SX127X_RF_SYNCVALUE4_SYNCVALUE (0x01)
/* Default */
1159
#define SX127X_RF_SYNCVALUE5_SYNCVALUE (0x01)
/* Default */
1160
#define SX127X_RF_SYNCVALUE6_SYNCVALUE (0x01)
/* Default */
1161
#define SX127X_RF_SYNCVALUE7_SYNCVALUE (0x01)
/* Default */
1162
#define SX127X_RF_SYNCVALUE8_SYNCVALUE (0x01)
/* Default */
1163
1164
/* RegPacketConfig1 */
1165
#define SX127X_RF_PACKETCONFIG1_PACKETFORMAT_MASK (0x7F)
1166
#define SX127X_RF_PACKETCONFIG1_PACKETFORMAT_FIXED (0x00)
1167
#define SX127X_RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE (0x80)
/* Default */
1168
1169
#define SX127X_RF_PACKETCONFIG1_DCFREE_MASK (0x9F)
1170
#define SX127X_RF_PACKETCONFIG1_DCFREE_OFF (0x00)
/* Default */
1171
#define SX127X_RF_PACKETCONFIG1_DCFREE_MANCHESTER (0x20)
1172
#define SX127X_RF_PACKETCONFIG1_DCFREE_WHITENING (0x40)
1173
1174
#define SX127X_RF_PACKETCONFIG1_CRC_MASK (0xEF)
1175
#define SX127X_RF_PACKETCONFIG1_CRC_ON (0x10)
/* Default */
1176
#define SX127X_RF_PACKETCONFIG1_CRC_OFF (0x00)
1177
1178
#define SX127X_RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK (0xF7)
1179
#define SX127X_RF_PACKETCONFIG1_CRCAUTOCLEAR_ON (0x00)
/* Default */
1180
#define SX127X_RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF (0x08)
1181
1182
#define SX127X_RF_PACKETCONFIG1_ADDRSFILTERING_MASK (0xF9)
1183
#define SX127X_RF_PACKETCONFIG1_ADDRSFILTERING_OFF (0x00)
/* Default */
1184
#define SX127X_RF_PACKETCONFIG1_ADDRSFILTERING_NODE (0x02)
1185
#define SX127X_RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST (0x04)
1186
1187
#define SX127X_RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK (0xFE)
1188
#define SX127X_RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT (0x00)
/* Default */
1189
#define SX127X_RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM (0x01)
1190
1191
/* RegPacketConfig2 */
1192
#define SX127X_RF_PACKETCONFIG2_WMBUS_CRC_ENABLE_MASK (0x7F)
1193
#define SX127X_RF_PACKETCONFIG2_WMBUS_CRC_ENABLE (0x80)
1194
#define SX127X_RF_PACKETCONFIG2_WMBUS_CRC_DISABLE (0x00)
/* Default */
1195
1196
#define SX127X_RF_PACKETCONFIG2_DATAMODE_MASK (0xBF)
1197
#define SX127X_RF_PACKETCONFIG2_DATAMODE_CONTINUOUS (0x00)
1198
#define SX127X_RF_PACKETCONFIG2_DATAMODE_PACKET (0x40)
/* Default */
1199
1200
#define SX127X_RF_PACKETCONFIG2_IOHOME_MASK (0xDF)
1201
#define SX127X_RF_PACKETCONFIG2_IOHOME_ON (0x20)
1202
#define SX127X_RF_PACKETCONFIG2_IOHOME_OFF (0x00)
/* Default */
1203
1204
#define SX127X_RF_PACKETCONFIG2_BEACON_MASK (0xF7)
1205
#define SX127X_RF_PACKETCONFIG2_BEACON_ON (0x08)
1206
#define SX127X_RF_PACKETCONFIG2_BEACON_OFF (0x00)
/* Default */
1207
1208
#define SX127X_RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK (0xF8)
1209
1210
/* RegPayloadLength */
1211
#define SX127X_RF_PAYLOADLENGTH_LENGTH (0x40)
/* Default */
1212
1213
/* RegNodeAdrs */
1214
#define SX127X_RF_NODEADDRESS_ADDRESS (0x00)
1215
1216
/* RegBroadcastAdrs */
1217
#define SX127X_RF_BROADCASTADDRESS_ADDRESS (0x00)
1218
1219
/* RegFifoThresh */
1220
#define SX127X_RF_FIFOTHRESH_TXSTARTCONDITION_MASK (0x7F)
1221
#define SX127X_RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH (0x00)
/* Default */
1222
#define SX127X_RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY (0x80)
1223
1224
#define SX127X_RF_FIFOTHRESH_FIFOTHRESHOLD_MASK (0xC0)
1225
#define SX127X_RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD (0x0F)
/* Default */
1226
1227
/* RegSeqConfig1 */
1228
#define SX127X_RF_SEQCONFIG1_SEQUENCER_START (0x80)
1229
1230
#define SX127X_RF_SEQCONFIG1_SEQUENCER_STOP (0x40)
1231
1232
#define SX127X_RF_SEQCONFIG1_IDLEMODE_MASK (0xDF)
1233
#define SX127X_RF_SEQCONFIG1_IDLEMODE_SLEEP (0x20)
1234
#define SX127X_RF_SEQCONFIG1_IDLEMODE_STANDBY (0x00)
/* Default */
1235
1236
#define SX127X_RF_SEQCONFIG1_FROMSTART_MASK (0xE7)
1237
#define SX127X_RF_SEQCONFIG1_FROMSTART_TOLPS (0x00)
/* Default */
1238
#define SX127X_RF_SEQCONFIG1_FROMSTART_TORX (0x08)
1239
#define SX127X_RF_SEQCONFIG1_FROMSTART_TOTX (0x10)
1240
#define SX127X_RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL (0x18)
1241
1242
#define SX127X_RF_SEQCONFIG1_LPS_MASK (0xFB)
1243
#define SX127X_RF_SEQCONFIG1_LPS_SEQUENCER_OFF (0x00)
/* Default */
1244
#define SX127X_RF_SEQCONFIG1_LPS_IDLE (0x04)
1245
1246
#define SX127X_RF_SEQCONFIG1_FROMIDLE_MASK (0xFD)
1247
#define SX127X_RF_SEQCONFIG1_FROMIDLE_TOTX (0x00)
/* Default */
1248
#define SX127X_RF_SEQCONFIG1_FROMIDLE_TORX (0x02)
1249
1250
#define SX127X_RF_SEQCONFIG1_FROMTX_MASK (0xFE)
1251
#define SX127X_RF_SEQCONFIG1_FROMTX_TOLPS (0x00)
/* Default */
1252
#define SX127X_RF_SEQCONFIG1_FROMTX_TORX (0x01)
1253
1254
/* RegSeqConfig2 */
1255
#define SX127X_RF_SEQCONFIG2_FROMRX_MASK (0x1F)
1256
#define SX127X_RF_SEQCONFIG2_FROMRX_TOUNUSED_000 (0x00)
/* Default */
1257
#define SX127X_RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY (0x20)
1258
#define SX127X_RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY (0x40)
1259
#define SX127X_RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK (0x60)
1260
#define SX127X_RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI (0x80)
1261
#define SX127X_RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC (0xA0)
1262
#define SX127X_RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE (0xC0)
1263
#define SX127X_RF_SEQCONFIG2_FROMRX_TOUNUSED_111 (0xE0)
1264
1265
#define SX127X_RF_SEQCONFIG2_FROMRXTIMEOUT_MASK (0xE7)
1266
#define SX127X_RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART (0x00)
/* Default */
1267
#define SX127X_RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX (0x08)
1268
#define SX127X_RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS (0x10)
1269
#define SX127X_RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF (0x18)
1270
1271
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_MASK (0xF8)
1272
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF (0x00)
/* Default */
1273
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY (0x01)
1274
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_TOLPS (0x02)
1275
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX (0x03)
1276
#define SX127X_RF_SEQCONFIG2_FROMRXPKT_TORX (0x04)
1277
1278
/* RegTimerResol */
1279
#define SX127X_RF_TIMERRESOL_TIMER1RESOL_MASK (0xF3)
1280
#define SX127X_RF_TIMERRESOL_TIMER1RESOL_OFF (0x00)
/* Default */
1281
#define SX127X_RF_TIMERRESOL_TIMER1RESOL_000064_US (0x04)
1282
#define SX127X_RF_TIMERRESOL_TIMER1RESOL_004100_US (0x08)
1283
#define SX127X_RF_TIMERRESOL_TIMER1RESOL_262000_US (0x0C)
1284
1285
#define SX127X_RF_TIMERRESOL_TIMER2RESOL_MASK (0xFC)
1286
#define SX127X_RF_TIMERRESOL_TIMER2RESOL_OFF (0x00)
/* Default */
1287
#define SX127X_RF_TIMERRESOL_TIMER2RESOL_000064_US (0x01)
1288
#define SX127X_RF_TIMERRESOL_TIMER2RESOL_004100_US (0x02)
1289
#define SX127X_RF_TIMERRESOL_TIMER2RESOL_262000_US (0x03)
1290
1291
/* RegTimer1Coef */
1292
#define SX127X_RF_TIMER1COEF_TIMER1COEFFICIENT (0xF5)
/* Default */
1293
1294
/* RegTimer2Coef */
1295
#define SX127X_RF_TIMER2COEF_TIMER2COEFFICIENT (0x20)
/* Default */
1296
1297
/* RegImageCal */
1298
#define SX127X_RF_IMAGECAL_AUTOIMAGECAL_MASK (0x7F)
1299
#define SX127X_RF_IMAGECAL_AUTOIMAGECAL_ON (0x80)
1300
#define SX127X_RF_IMAGECAL_AUTOIMAGECAL_OFF (0x00)
/* Default */
1301
1302
#define SX127X_RF_IMAGECAL_IMAGECAL_MASK (0xBF)
1303
#define SX127X_RF_IMAGECAL_IMAGECAL_START (0x40)
1304
1305
#define SX127X_RF_IMAGECAL_IMAGECAL_RUNNING (0x20)
1306
#define SX127X_RF_IMAGECAL_IMAGECAL_DONE (0x00)
/* Default */
1307
1308
#define SX127X_RF_IMAGECAL_TEMPCHANGE_HIGHER (0x08)
1309
#define SX127X_RF_IMAGECAL_TEMPCHANGE_LOWER (0x00)
1310
1311
#define SX127X_RF_IMAGECAL_TEMPTHRESHOLD_MASK (0xF9)
1312
#define SX127X_RF_IMAGECAL_TEMPTHRESHOLD_05 (0x00)
1313
#define SX127X_RF_IMAGECAL_TEMPTHRESHOLD_10 (0x02)
/* Default */
1314
#define SX127X_RF_IMAGECAL_TEMPTHRESHOLD_15 (0x04)
1315
#define SX127X_RF_IMAGECAL_TEMPTHRESHOLD_20 (0x06)
1316
1317
#define SX127X_RF_IMAGECAL_TEMPMONITOR_MASK (0xFE)
1318
#define SX127X_RF_IMAGECAL_TEMPMONITOR_ON (0x00)
/* Default */
1319
#define SX127X_RF_IMAGECAL_TEMPMONITOR_OFF (0x01)
1320
1321
/* RegLowBat */
1322
#define SX127X_RF_LOWBAT_MASK (0xF7)
1323
#define SX127X_RF_LOWBAT_ON (0x08)
1324
#define SX127X_RF_LOWBAT_OFF (0x00)
/* Default */
1325
1326
#define SX127X_RF_LOWBAT_TRIM_MASK (0xF8)
1327
#define SX127X_RF_LOWBAT_TRIM_1695 (0x00)
1328
#define SX127X_RF_LOWBAT_TRIM_1764 (0x01)
1329
#define SX127X_RF_LOWBAT_TRIM_1835 (0x02)
/* Default */
1330
#define SX127X_RF_LOWBAT_TRIM_1905 (0x03)
1331
#define SX127X_RF_LOWBAT_TRIM_1976 (0x04)
1332
#define SX127X_RF_LOWBAT_TRIM_2045 (0x05)
1333
#define SX127X_RF_LOWBAT_TRIM_2116 (0x06)
1334
#define SX127X_RF_LOWBAT_TRIM_2185 (0x07)
1335
1336
/* RegIrqFlags1 */
1337
#define SX127X_RF_IRQFLAGS1_MODEREADY (0x80)
1338
#define SX127X_RF_IRQFLAGS1_RXREADY (0x40)
1339
#define SX127X_RF_IRQFLAGS1_TXREADY (0x20)
1340
#define SX127X_RF_IRQFLAGS1_PLLLOCK (0x10)
1341
#define SX127X_RF_IRQFLAGS1_RSSI (0x08)
1342
#define SX127X_RF_IRQFLAGS1_TIMEOUT (0x04)
1343
#define SX127X_RF_IRQFLAGS1_PREAMBLEDETECT (0x02)
1344
#define SX127X_RF_IRQFLAGS1_SYNCADDRESSMATCH (0x01)
1345
1346
/* RegIrqFlags2 */
1347
#define SX127X_RF_IRQFLAGS2_FIFOFULL (0x80)
1348
#define SX127X_RF_IRQFLAGS2_FIFOEMPTY (0x40)
1349
#define SX127X_RF_IRQFLAGS2_FIFOLEVEL (0x20)
1350
#define SX127X_RF_IRQFLAGS2_FIFOOVERRUN (0x10)
1351
#define SX127X_RF_IRQFLAGS2_PACKETSENT (0x08)
1352
#define SX127X_RF_IRQFLAGS2_PAYLOADREADY (0x04)
1353
#define SX127X_RF_IRQFLAGS2_CRCOK (0x02)
1354
#define SX127X_RF_IRQFLAGS2_LOWBAT (0x01)
1355
1356
/* RegDioMapping1 */
1357
#define SX127X_RF_DIOMAPPING1_DIO0_MASK (0x3F)
1358
#define SX127X_RF_DIOMAPPING1_DIO0_00 (0x00)
/* Default */
1359
#define SX127X_RF_DIOMAPPING1_DIO0_01 (0x40)
1360
#define SX127X_RF_DIOMAPPING1_DIO0_10 (0x80)
1361
#define SX127X_RF_DIOMAPPING1_DIO0_11 (0xC0)
1362
1363
#define SX127X_RF_DIOMAPPING1_DIO1_MASK (0xCF)
1364
#define SX127X_RF_DIOMAPPING1_DIO1_00 (0x00)
/* Default */
1365
#define SX127X_RF_DIOMAPPING1_DIO1_01 (0x10)
1366
#define SX127X_RF_DIOMAPPING1_DIO1_10 (0x20)
1367
#define SX127X_RF_DIOMAPPING1_DIO1_11 (0x30)
1368
1369
#define SX127X_RF_DIOMAPPING1_DIO2_MASK (0xF3)
1370
#define SX127X_RF_DIOMAPPING1_DIO2_00 (0x00)
/* Default */
1371
#define SX127X_RF_DIOMAPPING1_DIO2_01 (0x04)
1372
#define SX127X_RF_DIOMAPPING1_DIO2_10 (0x08)
1373
#define SX127X_RF_DIOMAPPING1_DIO2_11 (0x0C)
1374
1375
#define SX127X_RF_DIOMAPPING1_DIO3_MASK (0xFC)
1376
#define SX127X_RF_DIOMAPPING1_DIO3_00 (0x00)
/* Default */
1377
#define SX127X_RF_DIOMAPPING1_DIO3_01 (0x01)
1378
#define SX127X_RF_DIOMAPPING1_DIO3_10 (0x02)
1379
#define SX127X_RF_DIOMAPPING1_DIO3_11 (0x03)
1380
1381
/* RegDioMapping2 */
1382
#define SX127X_RF_DIOMAPPING2_DIO4_MASK (0x3F)
1383
#define SX127X_RF_DIOMAPPING2_DIO4_00 (0x00)
/* Default */
1384
#define SX127X_RF_DIOMAPPING2_DIO4_01 (0x40)
1385
#define SX127X_RF_DIOMAPPING2_DIO4_10 (0x80)
1386
#define SX127X_RF_DIOMAPPING2_DIO4_11 (0xC0)
1387
1388
#define SX127X_RF_DIOMAPPING2_DIO5_MASK (0xCF)
1389
#define SX127X_RF_DIOMAPPING2_DIO5_00 (0x00)
/* Default */
1390
#define SX127X_RF_DIOMAPPING2_DIO5_01 (0x10)
1391
#define SX127X_RF_DIOMAPPING2_DIO5_10 (0x20)
1392
#define SX127X_RF_DIOMAPPING2_DIO5_11 (0x30)
1393
1394
#define SX127X_RF_DIOMAPPING2_MAP_MASK (0xFE)
1395
#define SX127X_RF_DIOMAPPING2_MAP_PREAMBLEDETECT (0x01)
1396
#define SX127X_RF_DIOMAPPING2_MAP_RSSI (0x00)
/* Default */
1397
1398
/* RegPllHop */
1399
#define SX127X_RF_PLLHOP_FASTHOP_MASK (0x7F)
1400
#define SX127X_RF_PLLHOP_FASTHOP_ON (0x80)
1401
#define SX127X_RF_PLLHOP_FASTHOP_OFF (0x00)
/* Default */
1402
1403
/* RegTcxo */
1404
#define SX127X_RF_TCXO_TCXOINPUT_MASK (0xEF)
1405
#define SX127X_RF_TCXO_TCXOINPUT_ON (0x10)
1406
#define SX127X_RF_TCXO_TCXOINPUT_OFF (0x00)
/* Default */
1407
1408
/* RegPaDac */
1409
#define SX127X_RF_PADAC_20DBM_MASK (0xF8)
1410
#define SX127X_RF_PADAC_20DBM_ON (0x07)
1411
#define SX127X_RF_PADAC_20DBM_OFF (0x04)
/* Default */
1412
1413
/* RegBitrateFrac */
1414
#define SX127X_RF_BITRATEFRAC_MASK (0xF0)
1415
1416
/* RegPll */
1417
#define SX127X_RF_PLL_BANDWIDTH_MASK (0x3F)
1418
#define SX127X_RF_PLL_BANDWIDTH_75 (0x00)
1419
#define SX127X_RF_PLL_BANDWIDTH_150 (0x40)
1420
#define SX127X_RF_PLL_BANDWIDTH_225 (0x80)
1421
#define SX127X_RF_PLL_BANDWIDTH_300 (0xC0)
/* Default */
1423
1424
#ifdef __cplusplus
1425
}
1426
#endif
1427
Generated on Tue Apr 14 2026 10:02:08 by
1.13.2
1.13.2 1.13.2