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periph_conf_common.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2016-2017 Inria
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
25#ifndef PERIPH_CONF_COMMON_H
26#define PERIPH_CONF_COMMON_H
27
28#include "periph_cpu.h"
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
65#define CLOCK_USE_PLL (1)
66
67#if CLOCK_USE_PLL
68/* edit these values to adjust the PLL output frequency */
69#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
70#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
71/* generate the actual used core clock frequency */
72#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
73#else
74/* edit this value to your needs */
75#define CLOCK_DIV (1U)
76/* generate the actual core clock frequency */
77#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
78#endif
85static const tc32_conf_t timer_config[] = {
86 { /* Timer 0 - System Clock */
87 .dev = TC3,
88 .irq = TC3_IRQn,
89 .pm_mask = PM_APBCMASK_TC3,
90 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
91#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
92 .gclk_src = SAM0_GCLK_1MHZ,
93#else
94 .gclk_src = SAM0_GCLK_MAIN,
95#endif
96 .flags = TC_CTRLA_MODE_COUNT16,
97 },
98 { /* Timer 1 */
99 .dev = TC4,
100 .irq = TC4_IRQn,
101 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
102 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
103#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
104 .gclk_src = SAM0_GCLK_1MHZ,
105#else
106 .gclk_src = SAM0_GCLK_MAIN,
107#endif
108 .flags = TC_CTRLA_MODE_COUNT32,
109 }
110};
111
112#define TIMER_0_MAX_VALUE 0xffff
113
114/* interrupt function name mapping */
115#define TIMER_0_ISR isr_tc3
116#define TIMER_1_ISR isr_tc4
117
118#define TIMER_NUMOF ARRAY_SIZE(timer_config)
125#define PWM_0_EN 1
126
127#if PWM_0_EN
128/* PWM0 channels */
129static const pwm_conf_chan_t pwm_chan0_config[] = {
130 /* GPIO pin, MUX value, TCC channel */
131 { GPIO_PIN(PA, 10), GPIO_MUX_F, 2 }, /* ~2 */
132 { GPIO_PIN(PA, 11), GPIO_MUX_F, 3 }, /* ~3 */
133};
134#endif
135
136/* PWM device configuration */
137static const pwm_conf_t pwm_config[] = {
138#if PWM_0_EN
139 {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
140#endif
141};
142
143/* number of devices that are actually defined */
144#define PWM_NUMOF ARRAY_SIZE(pwm_config)
152/* ADC Default values */
153#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
154
155#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
156#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
157#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
158
159static const adc_conf_chan_t adc_channels[] = {
160 /* port, pin, muxpos */
161 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
162 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A1 */
163 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* A2 */
164 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* A3 */
165 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* A4 */
166 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* A5 */
167 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* A6 */
168};
169
170#define ADC_NUMOF ARRAY_SIZE(adc_channels)
177static const i2c_conf_t i2c_config[] = {
178 {
179 .dev = &(SERCOM0->I2CM),
180 .speed = I2C_SPEED_NORMAL,
181 .scl_pin = GPIO_PIN(PA, 9),
182 .sda_pin = GPIO_PIN(PA, 8),
183 .mux = GPIO_MUX_C,
184 .gclk_src = SAM0_GCLK_MAIN,
185 .flags = I2C_FLAG_NONE
186 }
187};
188#define I2C_NUMOF ARRAY_SIZE(i2c_config)
195#ifndef RTT_FREQUENCY
196#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
197#endif
204static const sam0_common_usb_config_t sam_usbdev_config[] = {
205 {
206 .dm = GPIO_PIN(PA, 24),
207 .dp = GPIO_PIN(PA, 25),
208 .d_mux = GPIO_MUX_G,
209 .device = &USB->DEVICE,
210 .gclk_src = SAM0_GCLK_MAIN,
211 }
212};
215#ifdef __cplusplus
216}
217#endif
218
219#endif /* PERIPH_CONF_COMMON_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:83
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition periph_cpu.h:124
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:76
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition periph_cpu.h:130
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74
ADC Channel Configuration.
uint32_t inputctrl
ADC channel pin multiplexer value
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
Timer device configuration.
Tc * dev
pointer to the used Timer device